What are the responsibilities and job description for the Lead Formal Verification Engineer position at MindSource?
Title : Lead Formal Verification Engineer
Location : Sunnyvale, CA
Duration : 6-12 month C2H / Full-time
Salary : $220k - $240k / year base bonus equity benefits
Responsibilities :
Provide technical leadership in Formal Verification
Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at the top level and at the block level
Work with Architecture and Design team to come up with Formal driven specification and implementation
Define formal verification scope, develop abstraction strategies, create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level
Build reusable / scalable environments for Formal Verification and deploying the tools
Evaluate and recommend EDA solutions for Formal Verification
Provide training for internal teams and mentoring engineers related to Formal Verification Technology
Minimum Qualifications :
5 years of experience in RTL Design / Verification area including 3 years of experience in Formal Verification
Excellent understanding of formal verification methodologies, complexity reduction techniques and abstraction techniques
Strong analytical skills to craft Client and creative solutions to tackle industry-level complex designs
Fluency in hardware description languages, such as SystemVerilog and SVA
Proficiency in scripting languages such as Python, Perl, or Tcl
Excellent communication skills to ensure effective collaboration with cross functional teams
Knowledge of Formal verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc.
Experience with JasperGold or VC-Formal
Experience with simulators and waveform debugging tools
Preferred Qualifications :
Experience in formal property verification of complex compute blocks like DSP, CPU, GPU or HW accelerators
Experience with complex SoCs
Formal verification expertise in clock domain crossing, IP-XACT based register verification and low power
Experience with development of fully automated flows from specification to fully verified designs
Ability to quickly understand and interpret specifications and extract design behaviors / properties
Interested candidates please email your resume to sarath@mindsource.com
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