What are the responsibilities and job description for the Staff Design Verification Engineer position at Acara Solutions?
Our client is seeking an experienced Staff Design Verification Engineer to join a dynamic team focused on developing ultra-low power semiconductor solutions for AI edge designs in Internet of Things (IoT) applications. The ideal candidate will have 8-12 years of experience in semiconductor design verification and a proven track record of success in developing and executing verification plans for complex SoC designs.Location : Austin, TXDuration : Direct hire / fulltimePayrate : Up to $170k (Depending on experience)Responsibilities-Verify digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, and security hardware for IoT applications.-Develop test plans at block, sub-system, and chip levels.-Execute SoC-based verification at full-chip.-Write C-based library packages and tests.-Architect and implement scalable and reusable test benches using SystemVerilog and UVM.-Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.-Automate the test environment for randomized testing and scoreboarding.-Utilize advanced debugging techniques to identify and resolve design and verification issues.-Perform root-cause analysis and collaborate with design teams to address identified issues.-Define and track functional and code coverage metrics to ensure thorough verification.-Ensure that verification quality meets or exceeds industry standards and project requirements.-Edge-based AI inference experience is preferred.Required Skills / Qualifications : -BSEE / MSEE degree with 5-8 years of experience in block, sub-system, and full-chip verification.-Experience delivering multiple chips functioning to specification.-Proven ability to identify and manage verification deliverables, milestones, and schedules.-Strong understanding of multiple architectures, integrating 3rd party IPs / VIPs, and mixed-signal designs.-Strong exposure to design verification for low-power battery-operated designs.-Proficiency in C-based verification in an SoC environment.-Experience with ARM processor-based designs and low-power design techniques is a plus.-Languages : SystemVerilog (UVM), Verilog, C / C , Python, Perl, or Makefile.-Technologies : ARM M / RISC-V (preferred), AMBA AXI / AHB / APS, DMA, Flow Control, Serial Devices, : -Strong experience in low-power implementation methodologies.-Advanced timing signoff methodology experience.-Knowledge of DFT (BSCAN, MBIST, SCAN) and its impact on physical design flows.-Ability to independently complete Netlist-GDS P&R and signoff tasks.-Proven record in multi-million gate design production tapeouts.-Preferred technologies include MIPI (CSI / DSI), Crypto, OTP, DSP, and low-power solutions.Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, TalentRise, Viaduct) are Equal Employment Opportunity and Affirmative Action Employers. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender identity, sexual orientation, national origin, genetic information, sex, age, disability, veteran status, or any other legally protected basis. The Aleron companies welcome and encourage applications from diverse candidates, including people with disabilities. Accommodations are available upon request for applicants taking part in all aspects of the selection process.Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status.
Salary : $170,000
