Deep Learning Compiler Engineer for Ryzen AI NPU

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 We are looking for a talented Deep Learning Compiler SW Engineer to join our growing team in the AI group and play a crucial role in developing SW suite to deploy cutting-edge ML models on AMD’s XDNA Neural Processing Unit (NPU). You will be responsible for designing, implementing, and optimizing compilers, that translate Gen-AI ML inference models like SDXL-Turbo, Llama2, Mistral, etc into low-level code for specialized DL inference accelerator. Your work will directly impact the efficiency, scalability, and reliability of our Deep learning applications. If you thrive in a fast-paced environment and love working on cutting edge ML inference models, this role is for you.

Responsibilities:

• Design and develop novel algorithms for tiling and mapping quantized ML workloads on Ryzen AI NPU.
• Analyze and transform intermediate representations of ML models (computational graphs) for efficient execution.
• Collaborate with architects and runtime software engineers to understand performance requirements of different operators and translate them into effective compiler strategies.
• Collaborate with kernel developers to understand kernel tiling requirements and strategize the dataflow and L1/L2 buffer allocation schemes.
• Develop back-end optimization passes to convert high-level representation into driver calls.
• Implement compiler optimizations for performance, resource usage, and compute efficiency.
• Develop and maintain unit tests and integration tests for the compiler to support different generations of NPU architecture.
• Enable detailed profiling and debugging tools for analyzing performance bottlenecks and deadlocks in dataflow schemes.
• Stay up-to-date on the latest advancements in ML compiler technology and hardware architectures.

Qualifications:

• Master's degree or PhD. in Computer Science, Engineering, or a related field (or Bachelor's degree with significant experience).
• Strong understanding of the dataflow scheduling and memory hierarchy in a multi-core processor architecture.
• Knowledge of compiler design principles (front-end, middle-end, back-end).
• Experience with machine learning frameworks (e.g., TensorFlow, PyTorch).
• Experience working with ML compilers (e.g., MLIR, TVM).
• Experience with ML models such as CNN, LSTM, LLMs, Diffusion is a must.
• Excellent programming skills in Python, C , or similar languages.
• Experience with machine learning hardware architectures (e.g., GPUs, TPUs, VLIW) is a plus.
• A passion for innovation and a strong desire to push the boundaries of machine learning performance.

Location:

San Jose, Ca

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.