Director Firmware Engineering

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THE ROLE:
The Memory IO team is looking for a passionate and experienced Director - Firmware  leading designers for the development of high-speed LPDDR, DDR and inter-chip IO IPs.  Be a part of the definition, design, and development and productization phase of industry-leading Memory PHYs and interface IP.  This opportunity includes enabling of new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge Memory interfaces.  

THE PERSON:
Seeking a strong technical leader who has worked in the Memory space with extensive experience doing DDR, LPDDR, GDDR or HBM memory. You are familiar with controllers and/or memory technology especially from a validation point of view. Ideally, server based memory. You enjoy developing talent and growing worldwide teams. In addition, you are a change agent with a proven record of pushing the boundary of testing and driving test innovation. You possess strong interpersonal skills and excellent communication skills. You thrive on collaboration and solving complex organization challenges. 

 
KEY RESPONSIBILITIES:

• Lead firmware design and development of DDR PHY & DRAM Training steps
• Lead Firmware development of DDR PHY for ATE Testing, IP Char & SoC Power
• Drive pre-silicon FW coding and simulation against Architectural and RTL models
• Drive post-silicon lab bring-up and optimization of DDR Init and Run Time FW
• Post-silicon DDR Training enhancements to enable robust links for higher reliability / higher frequency margin
• Working with SoC/Product firmware teams to define features and specs

Recruit top talent to support the team's growth plans and develop the existing engineering team

Drive test innovation and strategic initiatives based on learning from prior programs and your own best practice knowledge

 
PREFERRED EXPERIENCE:

• Excellent knowledge of C, C and any scripting language ; knowledge of Verilog and Python is a plus
• Ability to adapt learn new toolsets and frameworks is required
• Strong understanding of synchronization techniques (handshakes, message passing) ; knowledge of hardware level clocking and synchronization is a plus
• Post-silicon experience developing firmware on real hardware is required. Experience with SERDES, DDR, Memory Controller, or MAC Design experience is preferred
• Strong understanding of computer organization/architecture.
• Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.
• Experience with low level, physical phenomena-oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.)

 
ACADEMIC CREDENTIALS:

• Bachelor’s degree in electrical or computer engineering is strongly desired. Master's or PhD degree is a plus.

LOCATION:  Austin, TX

#Hybrid 

#LI-SL3 

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.