Firmware Developer (Memory Initialization)

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THE ROLE:

AGESA BIOS team at AMD is looking for a software/firmware developer to join the team and help develop pre-OS BIOS firmware and silicon initialization code with a focus on memory initialization. As part of the role, the BIOS engineer will work closely with other firmware developers and architects in designing and implementing X86 and/or ARM firmware that spans pre- and post-silicon for all AMD business units.

THE PERSON: 

Passionate about firmware development on bare-metal or close to bare-metal environment. Possesses exceptional problem-solving skills, collaborative can-do attitude and strong work ethic. Deep understanding of computer architecture and low-level programming in C.

KEY RESPONSIBILITIES: 

• Develop, port, debug, and document core firmware support for various DRAM technologies including DDR4, LPDDR4/4x, DDR5, LPDDR5/5x RDIMM, LRDIMM, 3DS, etc., on AMD Desktop, Mobile, and Enterprise SoCs
• Collaborate with emulation/simulation teams during pre-silicon phase to validate memory hardware and firmware
• Work closely with hardware validation teams to optimize memory signal integrity, maximize performance and ensure robust feature support
• Assist memory validation teams with debug from initial power-on to achieve full feature functionality
• Develop custom memory firmware features for internal and external customers
• Engage with technical leads to understand firmware scope and work on implementation to meet schedules and milestones
• Work with internal and external teams to ensure the highest level of quality and satisfaction throughout the firmware lifecycle
• Exhibit strong organization, technical orientation, and ability to work collaboratively with geographically distributed technical teams

PREFERRED EXPERIENCE: 

• Solid understanding of firmware development cycles, integration and verification/validation for pre-si and post-si for SoC designs
• Expertise in low-level C programming & debugging for embedded systems
• Ability to methodically root-cause complex failure mechanisms at the IP, subsystem and/or system level
• Prior experience with BIOS and UEFI development, customization, and feature implementation experience
• Prior experience and/or exposure to testing platforms (Simulation and/or Emulation)
• Prior involvement in board, processor, or ASIC bring-up
• Familiarity with memory industry standards and technologies such as JEDEC, SPD Data, I2C/I3C, DDR4/5, LPDDR4/4x/5/5x UDIMM, RDIMM, LRDIMM, 3DS, ECC, Mode Registers, Self-Refresh, etc.
• Experience with or knowledge of DRAM Initialization/training algorithms, memory timings, addressing, overclocking, etc.

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s degree (preferred) in Computer Science, Computer Engineering, Electrical Engineering or related field

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.