Microprocessor Cache Verification Design Engineer

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THE ROLE:

AMD’s Cores Organization delivers industry leading CPU’s and caches that are the foundation of AMD’s server, client, and gaming business. We are looking for an experienced cache verification engineer to join this innovative team. The candidate will be a key contributor and potential leader for AMD’s next generation cores and caches. The candidate will join the team based in Fort Collins, CO. 

THE PERSON:

The candidate should have strong analytical thinking and problem-solving skills with excellent attention to details. We work on programs with long timelines, so self-motivation and a commitment to meeting deadlines is required.  We are pushing the envelope on chip performance, so the status quo must be challenged on every program. This requires creativity and innovation, but also excellent verbal and written communication skills. We work in small teams, but we are part of a large cross-site Core’s organization, so teamwork is also vital our success.

KEY RESPONSIBILITIES:

• Provide technical leadership for a dedicated team of verification engineers
• Perform Functional verification of high-speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL and gate design levels across SoC, Core and block hierarchies.
• Develop environments, infrastructure, and test plans to accommodate both full chip and stand-alone block-level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor.
• Based on thorough understanding of the design architecture, develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design leveraging C/C /Perl/assembly programming, logic design and simulation skill set.
• Drive project deliverables/dependencies with cross-discipline/site RTL, DFT and Implementation design teams along with product manufacturing teams.
• Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization.  Create technical presentations for peers and management.

PREFERRED EXPERIENCE:

• Prior experience with verification techniques of microprocessors/ASIC designs.
• Proven programming proficiency in x86 assembly, C/C , Perl, and Ruby languages along with strong logic simulation competence.
• Demonstrated expertise with Verilog HDL and System Verilog.
• Demonstrated solid understanding of modern computer architecture.
• DFT feature knowledge with JTAG -1149.x, Memory, Logic and I/O Built-In-Self-Test(BIST) and Scan design(LSSD/MuxD) structures and protocol would be a plus.

PREFERRED ACADEMIC CREDENTIALS:

• BS/MS in EE, CS, CSE (or similar)

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.