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SOC Power Modeling Engineer

Advanced Micro Devices, Inc
Austin, TX Full Time
POSTED ON 4/10/2025
AVAILABLE BEFORE 4/9/2026


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE:

We are seeking an SOC Power Modeling Engineer to join the AMD Client Architecture Team. In this role you will work closely with Architects, ASIC design engineers, performance modeling engineers, firmware engineers, and back-end teams to define, model and optimize power architecture for AMD's next generation mobile and desktop SOC’s.

THE PERSON:

We are looking for someone with a strong understanding of the complete specifications to tapeout SOC design flow and common industry design tools.  You will lead the creation and modeling of pre-RTL full SOC power consumption based on a combination of behavioral and correlated block models.  

KEY RESPONSIBILITIES:

  • Modeling power consumption and power delivery using combination of static, dynamic models and emulation data.
  • Analyze performance across voltages for DVFS states of IPs, including inference engines, CPUs, Graphics, memory controllers, peripheral interfaces, caches and network-on-chip fabric.
  • Interacting with the technology teams, silicon validation, and product engineering teams to establish voltage-frequency design points pre and post silicon.
  • Working with the test lab/teams to correlate models to silicon data.
  • Analyze effects of control algorithms for management throttling mechanisms to achieve peak CPU performance within EDP, thermal and peak current limits.
  • Incorporate electrical properties of on-die PDN, power gating, package and system power delivery into model.

PREFERRED EXPERIENCE:

  • SOC architecture knowledge with proficiency in one or more areas of SOC architecture (CPU, memory controllers, clocking, run-time control, network-on-chip, GPU, UPF, CPU power states including expertise in ACPI).
  • Prior years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • Skills in scripting, data analysis, experience with EDA tools, physical design tools for power optimization, VLSI design flow and CMOS technology.
  • Ability to understand and model thermal control loops and throttling mechanisms.
  • Strong problem solving, organizational and communication skills, and ability to work in a dynamic and diverse environment
  • Proficiency in scripting languages (Python) is highly preferred
  • Experience with MATLAB, Power Architect, Power Artist and VisualSim a plus

ACADEMIC CREDENTIALS:

  • Master's degree preferred in Electrical Engineering, Computer Engineering, Computer Science, or related field.

#LI-LB1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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