What are the responsibilities and job description for the Software Design Engineer position at Aegis Aerospace?
Aegis Aerospace is currently accepting applications for a Software Design Engineer to join our team in Denver, Colorado.
This is a hybrid or remote position with an expected salary of $120,000.00- $165,000.00 depending on location, experience, education, and certifications that are directly related to the position.
Overview
The purpose of this position is to work with the prime contractor in developing and Designing a Field Programmable Gate Array (FPGA) for the Geo-XO spacecraft. This position will support Aegis' contract with Lockheed Martin (LM) in Denver, CO. The software engineer will work with Lockheed Martin's team developing design requirements, source code, simulations test hardware using LM's design processes. In addition, perform integration activities. Applicants will be responsible for contributing to the verification and validation of the FPGA and support all design reviews. This role will also contribute to design review products, review of results, and communicating results effectively to all stakeholders.
Did you know?
Aegis Aerospace has more than 30 years of experience in creating innovative and practical solutions to fulfill defense and space needs.
We are looking for candidates who are ready to revolutionize the space and defense industry and pioneer new technological advancements to safeguard our country.
Are you ready to Innovate, Explore, and Protect?
Responsibilities
- Develop design requirements specification documents
- Design the FPGA (top level and sub block) as specified in the HW requirements / FPGA Design Requirements Specification in RTL source code
- Develop designer simulation test benches to confirm proper operation
- Perform Logic Synthesis, Place and Route and Static Timing Analysis
- Assist verification engineers in the verification of FPGA designs
- Source code will be developed on LM internal Information Technology networks in the UDE environment with GitLab configuration management
- Develop verification test benches in the UVM methodology in coordination with LM technical Points of Contact
- Develop design requirements specification documents
- Design the FPGA (top level and sub block) as specified in the HW requirements / FPGA Design Requirements Specification in RTL source code
- Develop designer simulation test benches to confirm proper operation
- Perform Logic Synthesis, Place and Route and Static Timing Analysis
- Assist verification engineers in the verification of FPGA designs
- Source code will be developed on LM internal Information Technology networks in the UDE environment with GitLab configuration management
- Develop verification test benches in the UVM methodology in coordination with LM technical Points of Contact
Qualifications
REQUIRED
DESIRED
About Aegis Aerospace
We are a woman-owned space and technology company headquartered in Houston, TX. Our primary objective is to support the Department of Defense and NASA in achieving their missions to defend the security of our country, reach new heights and to discover the unknown. We employ some of the brightest, most experienced engineering and technology experts in the U.S.
To learn more about Aegis Aerospace, visit our website at
Aegis Aerospace is an Equal Opportunity Employer / M / F / disability / protected veteran employer.
Salary : $120,000 - $165,000
