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FPGA Design Engineer

Akkodis
Grand Rapids, MI Contractor
POSTED ON 2/27/2025
AVAILABLE BEFORE 3/26/2025

Akkodis is recruiting for a FPGA Design Engineer with a client in the Grand Rapids, MI area. This is an onsite contract position with a pay range of $80 and hour to $95 an hour.


TOP MUST HAVES:

  • ACTIVE CLEARANCE / LOCAL TO GRAND RAPIDS
  • 1 – VHDL, read / understand / code
  • 2 – Test Bench, design / verification / requirements
  • 3 – Experience with Design & Microsemi
  • 4 – Pluses: Aerospace, DO 254, UVM, Sys Verilog

FPGA Design Engineer

Education Requirements: BS EE or Computer Engineering or Computer Science

# of Years of Experience: 5-10 years

Hardware / Software Knowledge Needed: VHDL, Xilinx, DOORS, ASIC, Aerospace application, DO-254

Tools / Equipment Knowledge Needed (i.e. calipers, forklift experience, etc.): SW debugging tools, multi-meters, Oscilloscope, Matlab

Dress Code & PPE items that are required: business casual

Hot Buttons for you that you want to see in candidate submittals. FPGA and ASIC experience

Roles and Responsibilities

• Perform tasks for any portion in the design lifecycle of an FPGA in the Xilinx, Microsemi and other product families.

• Design FPGA, ASIC and CPLD devices for avionics hardware applications

• Responsible for VHDL design using appropriate tools to perform design and simulation of the FPGA

• Responsible for requirements development and management in DOORs along with the preparation of appropriate DO-254 certification artifacts

• Uses judgment to make decisions or solve moderately complex tasks or problems in hardware design, manufacturing, or technology

• Uses technical experience and expertise for data analysis to support recommendations

• Responsible for working multiple projects with multiple teams in parallel

• Assure proper documentation of technical data generated for the assigned projects and/or tasks consistent with engineering polices and procedures


Desired Characteristics

• Preferred candidate has experience with Zynq and Polarfire devices in system on chip or system on module applications with the knowledge of high speed data interfaces and functions used in computing applications such as PCIe, AXI bus, SERDES, DMA, ect.

• Experience with avionics interfaces and protocols such as MIL-STD-1553, A429, A664, and TSN

• Experience with Intel Quartus, Lattice Diamond, Microsemi Libero and Xillinx Vivado• Experience in VHDL, Verilog and UVM Test Benches

• Experience with the Mentor Graphics Expedition Enterprise and Hyperlinx PI/SI

• Strong oral and written communication skills. Ability to document, plan, market, and execute programs

• Strong interpersonal and leadership skills

• Experience in the Mil/Aero/avionics, DO-254 and Civil FFA Certification

• Ability to break down complex problems and apply critical thinking


If interested, forward resume to tina. johnsonkelley@akkodisgroup.com

Equal Opportunity Employer/Veterans/Disabled


Benefit offerings available for our associates include medical, dental, vision, life insurance, short-term disability, additional voluntary benefits, an EAP program, commuter benefits, and a 401K plan. Our benefit offerings provide employees the flexibility to choose the type of coverage that meets their individual needs. In addition, our associates may be eligible for paid leave including Paid Sick Leave or any other paid leave required by Federal, State, or local law, as well as Holiday pay where applicable. Disclaimer: These benefit offerings do not apply to client-recruited jobs and jobs that are direct hires to a client.


To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit https://www.akkodis.com/en/privacy-policy.


The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:

· The California Fair Chance Act

· Los Angeles City Fair Chance Ordinance

· Los Angeles County Fair Chance Ordinance for Employers

· San Francisco Fair Chance Ordinance

Salary : $80 - $95

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