DFT Design Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE: 

The focus of this role is to plan, build, and execute the Design for Test Verification on next generation low power, high performance microprocessor

THE PERSON:  

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:  

• Collaborate with architects and RTL engineers to understand the new features to be verified 
• Build test plan documentation for DFT Design Verification
• Estimate the time required to write the new feature tests and any required changes to the test environment 
• Write test benches and tests to verify the DFT structures implemented within our designs
• Debug test failures to determine the root cause; work with RTL engineers to resolve design defects and correct any test issues  
• Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE:  

• Proficient in IP level ASIC verification 
• Proficient in debugging RTL code using simulation tools  

• Proficient in using UVM testbenches and working in Unix environments 
• Experienced with Verilog, System Verilog, C, and C    
• Knowledge of DFT architectures 
• Automating workflows in a distributed compute environment.   

• Strong background in the C language
• Good understanding and hands-on experience in the UVM concepts and SystemVerilog language 
• Scripting language experience: Perl, Makefile, shell preferred.   

• Exposure to leadership or mentorship is an asset 

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

LOCATION:

Austin, TX

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.