What are the responsibilities and job description for the CPU Gate Level Synthesis/Verification Engineer position at Apple?
Summary
Posted:
Role Number:200584342
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) is looking for a hardworking engineer for CPU gate level verification. In this role, the candidate would be part of Apple’s industry-leading CPU design team, working in a multi-functional role to design verification flows and ensure that our CPUs meet the highest standards for functional verification.
Description
You will own the gate level verification of Apple’s high-performance CPU projects. Responsibilities include but are not limited to:
• Running top level formal verification, structural gate checks, low power checks, and gate level simulations
• Supporting design team in block level verification runs and debug
• Running synthesis on the RTL to find potential gate-level issues early, and providing feedback to the appropriate teams
• Creating scripts to automate synthesis and verification runs, and track the results of our various verification checks
• Working with the CAD team to further develop and enhance our verification flows
Minimum Qualifications
- Minimum BS and 3 years of relevant industry experience
- Experience in digital logic design
- Experience with a scripting language
Key Qualifications
Preferred Qualifications
- The ideal candidate should possess CPU implementation and verification experience
- Knowledge of RTL-to-gate formal verification tools (LEC) and debug techniques, low power structural verification tools (VCLP), and gate simulation and X-propagation debug (Xcelium)
- Working knowledge of synthesis tools and flows and Perl and TCL scripting
Education & Experience
Additional Requirements
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Salary : $143,100 - $264,200
