What are the responsibilities and job description for the Emulation Verification Engineer position at Apple?
Summary
Posted:
Role Number:200576301
Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
As an Emulation Verification engineer, you will play a key role in preparing the wireless SoCs ready for emulation build by adding suitable monitors/checkers and sanitizing with testcases in emulation TB. Once the emulation build is ready, you will work on coming up with acceptance tests and executing the same on the emulation platform.
Description
In this role, core responsibilities include, but are not limited to, the following:
• Work closely with emulation team to bring up large Wireless SoCs along with their mixed signal components in emulation platform.
• Develop/utilize monitors/checkers on emulation platform.
• Preparing and executing the test plan and performing reviews with the cross functional teams.
• Collaborating cross functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams.
• Developing code for Design and verification that aids with emulation activities using Verilog/System Verilog/UVM.
Minimum Qualifications
- BS and 10 years of relevant experience.
- Hands-on experience with bring up, debugging and verification in Emulation.
- Proven Design Verification Skills.
- Experience with System Verilog verification environments including C/C DPI, UVM.
Key Qualifications
Preferred Qualifications
- Understanding of the tool flow from RTL to Emulation.
- Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions.
- Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow.
- Experience on any Scripting (Perl/Python/TCL).
- Excellent analytical and debug skills.
- Experience in UVM Acceleration is plus.
Education & Experience
Additional Requirements
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Salary : $175,800 - $312,200
