What are the responsibilities and job description for the Sr. Principal Technologist – AI Fabrics position at asteralabs?
Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com.
Are you passionate about pushing the boundaries of system, interconnect, software, and chip architecture? Do you thrive when pitching cutting-edge technology solutions to customers and industry partners? We are seeking a creative customer facing Technologist to help facilitate Astera’s development of data center connectivity solutions. In this role, you will play a pivotal role in driving the architecture and definition of future products by leveraging your expertise in system architecture, SOC architecture, PCIe/CXL/Ethernet technologies, AI Fabrics and switching, and hardware-software co-design. You will have the opportunity to directly engage with customers, influence product features and roadmap, and help drive innovation to better solve our customers bottlenecks in hyperscale data centers
This role is fully in person, in Santa Clara. Some travel may be required.
Basic qualifications
- BS in Electrical or computer engineering, MS or PhD preferred.
- ≥10 years' experience developing high-speed connectivity, fabric, and switching solutions for data centers (PCIe, Ethernet, CXL, etc.)
- Experience working in a customer-facing role with the ability to articulate technical concepts, influence decision-making, and build business cases
- Ability to dig deeply into technical challenges and use cases
- Strong understanding of chip design principles and architecture
- Strong understanding of datacenter system architecture and design challenges
- Strong understanding of “full stack” solutions from silicon to application integration
- Excellent communication and interpersonal skills with the ability to collaborate effectively with internal teams and external partners.
- Demonstrated leadership capabilities with a track record of driving technical initiatives and delivering results in a fast-paced environment.
- Willingness to travel occasionally for customer meetings and industry events.
Preferred experience
- Expertise in PCIe, CXL, and/or Ethernet protocols with a proven track record of designing high-performance interconnect solutions.
- Expertise in AI Fabrics and switching
- Experience in product integration with BIOS, kernel, OS, tooling, and BMCs
- Experience with board and system design
- Experience with benchmarking and performance optimization
- Existing engagement and robust network within industry organizations such as PCI-SIG, OCP, JEDEC, CXL, etc.
- Deep experience driving silicon definition based on customer requirements and managing product exploration internally.
The base salary range is $160,000.00 USD – $280,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ and non-binary people, veterans, parents, and individuals with disabilities.
Salary : $160,000 - $280,000
