Release Engineer (ASIC/FPGA)

Release Engineer (ASIC / FPGA)

Location : Littleton, CO

Job ID : #70558

Pay Range : $89-110 ph (W2)

Duration : 12 mos

The deadline to apply is 03 / 14 / 2025

Seeking a well-rounded Release Engineer who excels in release process; Contract Deliverable Requirements List (CDRL), Subcontract Deliverable Requirements List (SDRL), Statement of Work (SOW), release cycles, schedule, document management and tracking as well as data collection, infrastructure and analysis. The ideal candidate will have experience or be familiar with front-end ASIC or FPGA processes, tools, development lifecycle and risks.

• Collaborate with Technical Leaders in the development and review of CDRL items
• Reviewing the contract Statement of Work and evaluating all required CDRLs are relevant to FPGA
• Reviewing the applicable CDRLs to determining the frequency of release, and creating a schedule for CDRL deliveries to ensure that they are tracking to on-time release
• Working closely with Data Management (DM) to ensure that our schedules for upcoming CDRL releases are synchronized, and that CDRLs are released on time, adjudicated by the customer and by key stakeholder comments
• Work with FPGA Technical Leads to ensure awareness of upcoming CDRL releases and tracking of the same
• Ensure that the CDRL documents match the required Data Item Description (DID) requirements for content and format
• Work with the Integrated Product Team (IPT) schedule to ensure that the CDRLs are also correct in the Integrated Master Schedule (IMS)
• Report CDRL metrics and upcoming CDRL deliverables at the weekly Leader meetings
• Place the FPGA documents into document management and track the approvals to ensure that they are done in a timely manner
• For FPGA releases, ensure that the CDRL contents are met with the FPGA release, that the Circuitware is delivered to the customer on time, and that all CDRL coordination is done with DM
• Prepare CDRL and file release metrics and projections for analysis by Technical Leads and Management
• Assist with proposal creation, leveraging data from past projects
• Set up development and release tracking infrastructure for the development team to ensure consistency and completeness
• Communicate well with ASIC / FPGA engineers, Technical Leads and Managers, understanding the vernacular and lifecycle of semiconductor development.

Requirements :

Basic Qualifications :

Desired skills :

Benefits provided : 401K, medical, dental, and vision, sick time as applicable to state law

Butler America Aerospace, LLC. is proud to provide an equal opportunity workplace and be an affirmative action employer. Consider Butler because we are committed to hiring and retaining a diverse workforce. We recognize that we thrive on diversity and inclusion for the benefit of our employees, our customers, and the communities where we are located. Employment decisions are made without regard to race, color, religion, gender, national origin, ethnicity, veteran status, disability status, age, sexual orientation, gender identity, gender expression, marital status, mental or physical disability or any other legally protected status.

Salary : $89 - $110