Demo

Chip Level Verification Engineer

Canvendor
Sonoma, CA Full Time
POSTED ON 2/15/2025
AVAILABLE BEFORE 5/14/2025

We do have Chip level verification engineer role in Bay Area, CA / San Diego, CA(Onsite). Kindly go through the below job description share your updated resume if you are interested.

Job Title : Chip Level Verification Engineer

Duration : 12 Months

Location : Bay Area, CA / San Diego, CA(Onsite)

Job Description :

As a Chip Level Verification Engineer, you will be responsible for the comprehensive verification of complex integrated circuits at the top level. Your role will involve developing and executing verification plans, collaborating with design teams, and ensuring the overall functionality and reliability of the chip.

Key Responsibilities :

  • Develop and implement top-level verification plans.
  • Collaborate with design teams to understand specifications.
  • Utilize simulation and verification tools.
  • Identify and resolve design issues.
  • Maintain and enhance verification environments.
  • Document processes and create reports.
  • Ensure compliance with industry standards.

Qualifications :

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • Experience in chip design and verification.
  • Familiarity with Verilog or VHDL.
  • Strong analytical and problem-solving skills.
  • Excellent communication and teamwork abilities.
  • Skills :

  • HDL (Verilog, VHDL)
  • SystemVerilog
  • FPGA
  • ASIC
  • Scripting (Python, Perl)
  • Simulation tools (ModelSim, VCS)
  • Debugging and troubleshooting
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