What are the responsibilities and job description for the Post Silicon Validation Engineer position at capgemini?
Qualifications:
- BSEE, MSEE (or higher) preferred, in Electrical Engineering.
- Strong background in SOC/VLSI/Mixed Signal IC bring-up, production and characterization test, and product engineering.
- Strong fundamentals in IC design, Design for Test, and manufacturing concepts.
- Low level C, C , RISV-V assembler, micro coding, Python, and familiarity with either Verilog, VHDL and SystemRDL
- Ability to debug hardware using lab equipment
- Knowledge of test cell integration and production test program release
- Proven understanding of the latest DFT and test solutions.
- Ability to thrive in a multifaceted environment
- High level of motivation and energy
Hands on experience with one or more of the following
- RISC-V
- Network On Chip IPs
- Memory Controller IPs (DDR5)
- Low power testing
- PCIe and CXL (testing)
- UCIe
- familiarity with FPGAs
- use of Logic Analyzer, scope and in general HW/FW integration and debugging
Roles/Responsibilities:
- Working with custom network processors, transceivers, mixed signal ICs, multi-die modules, bare die, and stacked die.
- Drive the post-silicon validation cycle to meet Product Quality and Time to Market Metrics. In a multi-function team, you will define and develop test plans for optimized test.
- Design and Develop testability requirements in close partnership with IP and design teams and influence implementation of test features.
- Craft test hardware, bring up test, and release test programs to production.
- Develop test requirements for ground-breaking IP, to minimize test overhead both in design and for production.
- Develop custom test solutions spanning high power, large dies, and packages to cost-sensitive products.
- Expertise with Advantest 93K to drive to lower test costs via optimized test implementation.
- Work closely with OSATs to set up test infrastructure as well as deploy test programs for production.
C/C (Priority: 2)
Python (Priority: 2)
Verilog/VHDL (Priority: 1)
Silicon Validation tools (Priority: 1)
The pay range that the employer in good faith reasonably expects to pay for this position is $46.23/hour - $72.23/hour. Our benefits include medical, dental, vision and retirement benefits. Applications will be accepted on an ongoing basis.
Tundra Technical Solutions is among North America’s leading providers of Staffing and Consulting Services. Our success and our clients’ success are built on a foundation of service excellence. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. Qualified applicants with arrest or conviction records will be considered for employment in accordance with applicable law, including the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act. Unincorporated LA County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: client provided property, including hardware (both of which may include data) entrusted to you from theft, loss or damage; return all portable client computer hardware in your possession (including the data contained therein) upon completion of the assignment, and; maintain the confidentiality of client proprietary, confidential, or non-public information. In addition, job duties require access to secure and protected client information technology systems and related data security obligations.
Salary : $46 - $72