What are the responsibilities and job description for the Senior Analog Layout Engineer position at Capgemini?
Senior Analog Layout Engineer-078097
Description
Job description :
Senior Analog Layout Engineer will be responsible for layout of high-performance analog cores such as analog-to-digital converters, digital-to-analog converters, PLL, transceivers, etc.
Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 3nm, 5nm, 7nm, 16nm, following best practices from the industry.
Key responsibilities :
- We will be designing analog layout using industry standard EDA tools from Cadence, Mentor and Synopsys for silicon chip design and production.
- Must be able to set up LVS, DRC, ERC environments and debug verification issues using Cadence and Mentor tools.
- We will be extensively working with RF, Serdes, Analog blocks and Transceiver; Also working with floor planning, block level routing and top-level chip assembly.
- Knowledge of high-performance analog layout techniques such as common centroid layout, shielding, use of dummy devices, thermal aware layout with consideration for electromigration.
Required Skills
Must possess strong written and verbal communication skills
Life at Capgemini
Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer :
Salary : $76,200 - $178,290
