What are the responsibilities and job description for the Layout Design Engineer, Lead position at CELERO COMMUNICATIONS INC?
Are you a Lead Layout Design Engineer who is seeking am amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for a Lead Layout Design Engineer – someone who is excited to join a fast growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs!
Preferred Location - On-Site at our Irvine, Ca HQ
What You Will Do :
- The role entails working collaboratively and multi-functionally with a multi-disciplinary team of Exceptional Analog Mixed Signal Design Engineers, DSP, Electronics, and Systems engineers
- Conduct chip layout circuit design, circuit checking, and device evaluation and characterization.
- Responsible for chip floorplan, routing, chip assembly, and back-end verification across multiple projects. Perform physical layout for mixed-signal functions like PLL's, high speed ADC, DAC circuits, ESD structures designs in state-of-the-art sub-micron
- You'll work with talented DSP and mixed-signal engineers to customize designs for integration in high speed SERDES products
- Job duties will include floor planning, custom layout and verifying against design rules and schematics. Fill, post-processing, DRC mitigation, and foundry interactions
- Experience in
What You Will Bring :