What are the responsibilities and job description for the Summer Intern, Design Verification position at Cirrus Logic?
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
Cirrus Logic's Design Verification Engineering team is looking for an intern who will work as a part of the design verification team to perform pre-silicon verification on mixed-signal products using SystemVerilog, UVM, and other verification techniques such as assertions, functional coverage, and constrained-random verification. Our intern will work closely with digital designers, firmware developers, and systems engineers to support pre-silicon verification.
RESPONSIBILITIES :
Assist with verification planning.Support with testbench developmentMaintenance with failure analysis and resolutionHelp with coverage analysis and populationWork on digital / mixed-signal modeling, directed / constraint-random test generation, and flow developmentREQUIRED KNOWLEDGE, SKILLS AND EXPERIENCE :
Must have a BSEE / BSCE and be pursuing an MSEE / MSCEStrong background with Verilog / SystemVerilogPREFERRED KNOWLEDGE, SKILLS AND EXPERIENCE
Experience with UVMScripting (e.g. Perl, Python, Unix / Linux shell)Knowledge of signal processing concepts, MatlabObject oriented programming (e.g. SystemVerilog)
This position will be located in Austin, Texas. The internship will be onsite. This opportunity is available for the
summer semester only . It is available only to students currently enrolled in an MS or PhD program in Electrical Engineering maintaining a GPA of 3.6 or above, and who will be returning to school for at least one semester following completion of his / her internship. Candidate must be available for full-time employment during the internship.
Cirrus Logic follows a 2 day in-office work schedule but interns should expect to be in the office more often, up to 5 days per week, based on business needs and team preference. Interns must be based within commutable distance of the work location listed on the job posting, or willing to relocate prior to beginning their internship with Cirrus Logic.
Diversity drives innovation at Cirrus Logic. Different approaches, ideas and points of view are both valued and respected, and employees are rewarded for their skills, experience and performance. Additionally, Cirrus Logic is an Equal Opportunity / Affirmative Action Employer, and we do not discriminate on the basis of race, color, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, gender identity, genetic information or any other characteristic protected by law.
