Demo

Physical Design Engineering Lead

Cisco Systems, Inc.
San Jose, CA Full Time
POSTED ON 12/9/2024
AVAILABLE BEFORE 2/7/2025

Application Window Expected to close 12/20/24

Meet the Team

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed.

Your Impact

As a Technical Leader, you will be responsible for overseeing the design and verification of application-specific integrated circuits (ASICs), ensuring they meet performance, power, and area specifications. This role involves coordinating cross-functional teams, guiding design methodologies, and addressing technical challenges throughout the development process to ensure successful tape-out and compliance with industry standards. Responsibilities include:

  • Lead chip-level PNR activities, from floor planning , bump and rdl planning, power grid design to clock planning , routing, and timing closure.
  • Perform full chip DRC/LVS/ERC/ANT checks, review and debug the issues, provide solutions and ensure signoff clean results.
  • Work closely with block and TOP level physical implementation, IP development teams and to resolve PV issues and address to proper owners.
  • Deploy and improve physical verification flows and methodologies. Develop custom check as per need for verification robustness.
  • Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with frontend, integration, and verification teams.

Minimum Qualifications:

  • BS/MS in Electrical Engineering or Computer Science, with 10 year minimum of hands-on experience in ASIC implementation and Physical verification
  • Experience in deep submicron CMOS technologies.
  • Experience with physical verification (DRC, LVS, ERC, ANT), debug, and solution.
  • Scripting experience in TCL, Perl, or Makefile to streamline and automate workflows.

* Experience working with one or more of the following physical design tools, such as Cadence, Innovus, Synopsys IC Compiler, or Fusion Compiler.

Preferred Qualifications:

  • Extensive experience working with block or full chip physical verification and/or owning Physical Verification CAD flow development and support.
  • Experience on 5nm nodes and below.
  • Experience working with semiconductor foundries on installation and maintenance of process design kits (PDKs) for SOC physical design teams.
  • Experience working with Package and floorplan teams to define padring and bump-map design.

Why Cisco?

#WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!

Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data travelling at light speed across connections does so securely, yet it's not what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other; schools, colleges and universities to teach in even the most challenging of times. We're helping businesses of all shapes and size to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.

We tackle whatever challenges come our way. We have each other's backs, we recognize our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).

We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we're committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.

So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCisco



 

If your compensation planning software is too rigid to deploy winning incentive strategies, it’s time to find an adaptable solution. Compensation Planning
Enhance your organization's compensation strategy with salary data sets that HR and team managers can use to pay your staff right. Surveys & Data Sets

What is the career path for a Physical Design Engineering Lead?

Sign up to receive alerts about other jobs on the Physical Design Engineering Lead career path by checking the boxes next to the positions that interest you.
Income Estimation: 
$134,206 - $155,125
Income Estimation: 
$171,024 - $193,943
Income Estimation: 
$90,372 - $103,622
Income Estimation: 
$111,859 - $131,446
Income Estimation: 
$110,457 - $133,106
Income Estimation: 
$105,809 - $128,724
Income Estimation: 
$122,763 - $145,698
Income Estimation: 
$90,267 - $107,792
Income Estimation: 
$125,799 - $152,617
Income Estimation: 
$110,220 - $132,692
Income Estimation: 
$111,195 - $140,107
Income Estimation: 
$126,558 - $144,904
Income Estimation: 
$133,507 - $160,824
Income Estimation: 
$188,927 - $229,849
Income Estimation: 
$163,041 - $197,583
Income Estimation: 
$171,178 - $212,692
Income Estimation: 
$188,211 - $213,397
Income Estimation: 
$136,611 - $163,397
Income Estimation: 
$169,825 - $204,021
Income Estimation: 
$166,631 - $195,636
Income Estimation: 
$162,237 - $199,353
Income Estimation: 
$181,083 - $218,117
View Core, Job Family, and Industry Job Skills and Competency Data for more than 15,000 Job Titles Skills Library

Job openings at Cisco Systems, Inc.

Cisco Systems, Inc.
Hired Organization Address Washington, DC Full Time
The application window is expected to close on: 01/10/25. However, the job posting may be removed earlier if the positio...
Cisco Systems, Inc.
Hired Organization Address Seattle, WA Full Time
Amazon is a global technology powerhouse, renowned for its relentless innovation and customer-centric approach. Founded ...
Cisco Systems, Inc.
Hired Organization Address Atlanta, GA Full Time
Application window expected to close 1/13/25. Job posting may be removed earlier if the position is filled or if a suffi...
Cisco Systems, Inc.
Hired Organization Address San Jose, CA Full Time
The application window is expected to close on: 1/24/2025. Job posting may be removed earlier if the position is filled ...

Not the job you're looking for? Here are some other Physical Design Engineering Lead jobs in the San Jose, CA area that may be a better fit.

Physical Design Engineering Lead

Cisco, San Jose, CA

AI Assistant is available now!

Feel free to start your new journey!