Analog Mixed-Signal Layout Design Engineer

The application window is expected to close on: 05/09/2025.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design optical modules for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.

You will be part of our Analog Mixed-Signal Layout Design team and collaborate with the Analog Mixed-Signal Circuit Design teams and Silicon Photonics design teams to create high-speed, high-performance, and highly integrated optical transceivers.

Your Impact

In this role, you will play a crucial part in producing high-quality physical designs for high-speed connectivity in hyperscale data centers and other critical networks. You will support Circuit Designers by contributing to the CAD layout of physical designs for high-performance analog/mixed-signal optical transceiver circuits, utilizing advanced process technologies. Your work will involve designing components like frequency synthesizers, clock distribution systems, transmitters, and more.

• 
  Create detailed analog and mixed-signal IC layout designs for analog, covering stages from floor planning, block design, and top-level design to tapeout
• Collaborate closely with circuit design engineers to ensure layouts meet the required specifications for electrical, performance, matching, and reliability
• Perform verification on advanced node technologies, ensuring compliance with DRC, LVS, antenna rules, density rules, ERC, Virtuoso XL compliance, reliability, and in-house best practices.
• Optimize layouts to minimize noise coupling, crosstalk, electromigration, matching issues, latch-up prevention, and ensure ESD robustness.
• Perform parasitic extraction to ensure that layout achieves targeted performance, considering parasitic effects.
• Use industry-standard CAD layout tools such as Cadence Virtuoso, Cadence Pegasus, and Siemens Calibre, among others.
• Support tape-out activities, including chip-level integration, full-chip verification, and documentation.
• Contribute to methodology enhancements, automation, and layout efficiency improvements to streamline the design process.
• Coordinate with the photonics team and other cross functional teams to improve the overall system.
• Divide layout tasks into component parts to work in parallel with other layout design engineers when it helps accelerate project timelines.
• Provide ongoing schedule guidance on tasks to the manager.
• Complete checklists and follow company design flows and other quality assurance methodologies.
• Present your work in layout reviews, review layouts from other layout design engineers, and collect feedback for continuous improvement of circuit layouts and documentation.
• Perform post-layout analysis and debugging to support silicon validation and characterization activities when necessary.

Minimum Qualifications:

• 4 year degree, related field, or equivalent education
• 8 years experience of mask design experience in sub-micron CMOS (7nm or smaller geometries)
• 3 years of experience in high precision analog/mixed signal circuit
• Experience with layout in the Cadence Virtuoso design environment and Siemens Mentor Calibre or Cadence Pegusus verification tool

Preferred Qualifications:

• BSEE is preferred
• 10 years of proven experience in analog mixed-signal layout design, particularly in high-speed circuits (more than 10 GHz)
• Working knowledge of debugging with DRC/LVS/ERC with Cadence Pegasus or Siemens Calibre
• Experience translating concepts such as parasitics, matching, crosstalk, transistor layout dependent effects, latchup, IR drop, electromigration and triple well processes into physical design constraints
• Proficient experience in chip-level floor planning, analog block integration and the ability to use productivity-enhancing tools and design scripts is desirable

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Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.

We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do!

Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!

U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.

Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco’s flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco’s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;

1.5% of incentive target for each 1% of attainment between 50% and 75%;

1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.