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Senior Staff Engineer, CPU Micro-architecture

Conductor
San Jose, CA Full Time
POSTED ON 1/29/2025
AVAILABLE BEFORE 4/17/2025

Senior Staff Engineer, CPU Micro-architecture

San Jose, California, United States

Please Note :

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

What You’ll Do

The APL (Advanced Processor Lab) is one of the research teams of SAIT (Samsung Advanced Institute of Technology), which is Samsung‘s R&D hub, established as the incubator for cutting-edge technologies. APL is committed to shaping the future of CPU processor and SoC architecture for the most demanding applications of the future like AI and HPC. We are seeking an experienced CPU Micro architect to join our high-performance CPU design team. In this role, you will be responsible for defining, developing, and optimizing the microarchitecture of cutting-edge CPU cores.

Responsibilities :

  • Define and develop the microarchitecture for high-performance CPU / GPU / DSP / AI Engine cores for HPC, Datacenter, or AI platforms / applications.
  • Collaborate with team members to transform high-level CPU architectural models into detailed microarchitectural implementations.
  • Optimize CPU designs for performance, power, and area while maintaining overall system coherence and efficiency.
  • Lead and participate in the design of key CPU components, including instruction pipelines, branch prediction, execution units, and memory subsystems.
  • Work closely with RTL engineers to ensure proper translation of microarchitecture specifications into clean and efficient RTL code.
  • Perform microarchitecture modeling and simulations to evaluate performance and ensure design robustness.
  • Identify, debug, and resolve architectural and microarchitectural bottlenecks.
  • Collaborate with verification, backend, and physical design engineers to ensure design goals are met across different domains.
  • Contribute to the CPU roadmap by identifying new techniques, features, and optimizations to stay ahead of industry trends.

What You Bring

  • Bachelors in Electrical / Computer Engineering with 15 years of relevant industry experience, or Masters in Electrical / Computer Engineering with 13 years or PhD in Electrical / Computer Engineering with 8 years preferred.
  • 5 years of experience in CPU design and microarchitecture, with hands-on experience in developing and optimizing microarchitectures for high-performance CPU cores.
  • Strong understanding of CPU architectures, instruction sets (such as x86, ARM, RISC-V), and microarchitecture design principles (out-of-order execution, multi-level caches, branch prediction, etc.).
  • Proficiency in RTL design, including experience with Verilog / System Verilog.
  • Proven experience in microarchitecture modeling, simulation, and performance evaluation.
  • Deep knowledge of pipelining, superscalar execution, and out-of-order execution architectures.
  • Familiarity with memory hierarchies, including caches, TLBs, and memory management, cache coherence protocols, etc.
  • Experience with power and performance trade-offs.
  • Preferred Skills :

  • Experience with RISC-V / ARM / x86 architecture and other open-source CPU architectures.
  • Proficiency in using performance tools and simulators such as gem5 or custom architectural models.
  • Familiarity with multicore and multi-threaded CPU designs.
  • Understanding of ASIC physical design flows, including clocking, timing closure, and power management.
  • You’re inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.
  • What We Offer

    The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones.

    Equal Opportunity Employment Policy

    Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

    Covid-19 Policy

    To help keep our employees, customers, and communities safe, we’ve developed guidelines for our teams. Currently, we encourage vaccination for all employees and may require it depending on job functions (e.g., traveling for business, meeting with customers).

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