What are the responsibilities and job description for the ASIC Package SI/PI Engineer position at Datum Software, Inc.?
Job Details
Job Description:
ASIC Package SI/PI Engineer
Location: San Jose, CA
100% Onsite
ASIC Package Engineer SI/PI Responsibilities:
- Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimization
- Define power tree structure, netlists, etc for High Performance Computing based on 2.5D/3D package technology
- Run pre-layout and post-layout simulation flow with a focus on high-speed interface and PDN, create simulation models and develop simulation methodology for SIPI.
- Develop SIPI validation methodology and develop detailed engineering test plans
- Validate high speed interface and PDN impedance in lab to correlate simulation results and improve design flow
- Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure package/system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysis
- Package/Board power delivery network AC DC simulation for low-voltage/high-current supplies.
- Development of next generation memory interface considering Input/Output Physical Layer (IO PHY), SI/PI and physical design.
Preferred Qualifications:
- Bachelor or Master degree in Electrical Engineering, Physics, Mathematics, or related field (or equivalent experience)
- 5 years of experience in SIPI simulation and validation areas
- Experience with high-speed interface protocols such as MIPI, PCIe, memory, HBM and USB.
- Experience using Cadecen Sigrity, PowerSI, Ansys SIwave, Keysight ADS, 3D layout and Ansys HFSS
- Experience with consumer hardware design, review and bring-up process, CAD tools, constraint manager etc.
- Solid understanding and experience in computational electromagnetics and transmission line theory.
- Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimization
- Define power tree structure, netlists, etc for High Performance Computing based on 2.5D/3D package technology
- Run pre-layout and post-layout simulation flow with a focus on high-speed interface and PDN, create simulation models and develop simulation methodology for SIPI.
- Develop SIPI validation methodology and develop detailed engineering test plans
- Validate high speed interface and PDN impedance in lab to correlate simulation results and improve design flow
- Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure package/system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysis
- Package/Board power delivery network AC DC simulation for low-voltage/high-current supplies.
- Development of next generation memory interface considering Input/Output Physical Layer (IO PHY), SI/PI and physical design.
Important-
- Cadence Sigrity (Priority: 1)
- Ansys SIwave (Priority: 1)
- Keysight ADS (Priority: 2)
- 3D layout (Priority: 2)
- Ansys HFSS (Priority: 2)
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