What are the responsibilities and job description for the RTL Design Engineer position at efabless.com?
Job Title : RTL Design Engineer
Location : Remote
About Efabless :
Efabless is the world's first platform for community-driven chip design and manufacturing. We empower engineers to design and produce custom chips at zero upfront cost, using our open-source design environment and a global network of manufacturing partners. Our mission is to democratize access to custom silicon and accelerate innovation in the electronics industry.
About ChipIgnite :
ChipIgnite is Efabless' innovative program designed to lower the barrier of entry for creating custom silicon. It provides a streamlined path for turning ideas into physical silicon, offering free chip design, manufacturing, and packaging for select projects.
Job Summary :
The ideal candidate will have a strong background in synthesis, DFT (Design for Test), place-and-route (PnR), and verification, and must be proficient in developing SDC (Synopsys Design Constraints) for timing closure. Familiarity with open-source (OS) tools and technologies is a significant advantage. Candidates with SoC design experience are preferred, as this role involves optimizing designs for performance, power, and area across complex SoC projects.
Responsibilities :
- Develop, optimize, and maintain high-quality RTL code for digital blocks, ensuring it meets area, power, and timing constraints.
- Define and develop SDC constraints to facilitate synthesis and timing closure, working closely with physical design and synthesis teams.
- Collaborate with DFT and PnR teams to ensure designs meet testability and physical implementation requirements.
- Support synthesis efforts, performing timing analysis and working through timing issues with cross-functional teams.
- Leverage open-source (OS) tools and methodologies, where applicable, to enhance verification and design workflows.
- Work closely with the verification team to debug and resolve functional issues, ensuring thorough testing and validation.
- Participate in SoC-level integration, verification, and bring-up, with a focus on ensuring top-level functionality and performance.
- Document design processes, contribute to design reviews, and uphold best practices in RTL development and verification.
Requirements :
Preferred Qualifications :
