What are the responsibilities and job description for the Senior Digital Verification Engineer position at Efficient Computer Service LLC?
Join Efficient as a Senior Digital Verification Engineer and play a crucial role in the next computing revolution! We're on the lookout for a talented engineer with industry experience to lead our verification initiatives for our first-generation product. As a key member of our team, you will help verify Efficient's innovative Fabric technology by creating UVM testbenches, analyzing coverage reports, and executing test plans. This is a golden opportunity to shape our internal processes and contribute to robust designs as we scale to higher-performance product lines.
Key Responsibilities
- Develop modular UVM testbenches and tests to thoroughly verify various design components.
- Implement a constraint-random test methodology to effectively stimulate the device-under-test, enhancing coverage and uncovering bugs.
- Compose SystemVerilog assertions to validate design invariants.
- Add cover points / groups to refine code coverage metrics and support coverage closure.
- Collaborate with the digital design team to swiftly identify and resolve bugs and coverage gaps.
- Assist in running gate-level simulations as part of the design signoff process.
- Provide support to third-party vendor engineers when questions arise.
- Help build a verification dashboard to offer quick insights into the verification status of designs and identify any regressions.
- Contribute to the development of internal processes and frameworks aimed at enhancing code quality, coverage, and accuracy.
Required Qualifications & Experience
