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Analog / Mixed Signal Layout Engineer

Element Technologies Inc
San Jose, CA Contractor
POSTED ON 2/24/2025
AVAILABLE BEFORE 3/22/2025

Job Description: Analog / Mixed Signal Layout Engineer

Location: San Jose, CA

Long Term Contract



Key Responsibilities:

  • Perform full-custom layout of mixed-signal circuits (e.g., ADCs, DACs, PLLs) across advanced nodes (7nm, 5nm, 3nm).
  • Optimize layouts for performance, power, and area while ensuring DRC/LVS compliance.
  • Collaborate with design and verification teams to meet project specifications and timelines.
  • Conduct parasitic extraction and resolve layout-dependent effects (LDE) in advanced process technologies.
  • Interface with Intel and TSMC foundry teams for process requirements, design reviews, and tapeout.

Qualifications:

  • Proven experience in mixed-signal IC layout using tools like Cadence Virtuoso.
  • Hands-on experience with advanced process nodes (7nm, 5nm, 3nm) for both Intel / TSMC technologies.
  • Strong understanding of EDA tools, DRC/LVS checks, and parasitic extraction.
  • Knowledge of layout best practices for analog, RF, and mixed-signal designs.
  • Bachelor’s/Master’s in Electrical/Electronics Engineering or equivalent experience.


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