Demo

Senior Analog IC Layout Engineer

Elevate Semiconductor
San Diego, CA Full Time
POSTED ON 1/13/2025
AVAILABLE BEFORE 7/7/2025
Elevate Semiconductor is at the forefront of shaping the future of semiconductor technology, driving innovation to enable the next generation of testing. We deliver comprehensive solutions that streamline semiconductor testing, empowering faster time-to-market and enhanced capabilities. Our diverse product portfolio includes standard, semi-custom, and custom SKUs, all engineered for longevity and compatibility across evolving technological advancements. By focusing on low-power, high-density designs, we aim to lower the cost of testing while exceeding expectations on every project.

Join us in advancing the cutting edge of semiconductor innovation!

The Position

We are seeking a highly skilled Senior Analog Layout Engineer to join our team in developing state-of-the-art integrated circuits (ICs). In this role, you will handle the physical layout and verification of highly complex, high-voltage, and mixed-signal solutions using advanced process technologies, ranging from 65nm CMOS to 100 V BCD. You will collaborate with a cross-functional team to optimize silicon design, leveraging mentorship and support from senior engineers to deliver innovative and cost-effective solutions.

Responsibilities

  • Perform physical layout of analog and mixed-signal integrated circuits at the block and chip level
  • Conduct floorplanning and placement of circuit components to optimize area, performance, and power
  • Verify layouts using industry-standard tools for LVS (Layout vs. Schematic) and DRC (Design Rule Checking) to ensure compliance with process design rules
  • Collaborate with design engineers to understand circuit specifications and ensure layout accuracy
  • Work with cross-functional teams, including digital design and packaging, to optimize overall chip performance
  • Troubleshoot and resolve issues related to layout verification and manufacturing
  • Ensure designs are robust for high-yield manufacturability


Requirements

  • Bachelor's degree in Electrical Engineering or a related field
  • Strong knowledge of analog CMOS circuits and device physics fundamentals
  • Solid understanding of the IC design, qualification, and manufacturing lifecycle
  • Experience with industry-standard EDA tools for analog and mixed-signal design (e.g., Cadence, Mentor Graphics, Tanner)
  • Proficiency in performing LVS and DRC verification using Cadence or Mentor tools
  • Willingness and ability to work onsite in San Diego, CA


Preferences

  • Layout experience with STI High voltage (100V ) BCD and LDMOS processes
  • Layout experience with mixed voltage (multiple supply rails, 6 or more) domains
  • Layout experience with high speed multi Gbps circuits
  • Layout experience in ultra-high accuracy and precision circuits
  • Layout experience with high resolution data converters
  • Layout experience with BiCMOS process technology
  • Programming and scripting ability a strong plus, particularly in SKILL and Calibre scripts


Why Join Us?

At Elevate Semiconductor, you'll be part of a dynamic team working on innovative technologies that shape the future of the semiconductor industry. We offer competitive compensation, comprehensive benefits, and opportunities for professional growth in a collaborative environment.

Apply Today!

If you are passionate about digital design and eager to contribute to groundbreaking semiconductor solutions, we want to hear from you!

Benefits

  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Hybrid Work Models
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

If your compensation planning software is too rigid to deploy winning incentive strategies, it’s time to find an adaptable solution. Compensation Planning
Enhance your organization's compensation strategy with salary data sets that HR and team managers can use to pay your staff right. Surveys & Data Sets

What is the career path for a Senior Analog IC Layout Engineer?

Sign up to receive alerts about other jobs on the Senior Analog IC Layout Engineer career path by checking the boxes next to the positions that interest you.
Income Estimation: 
$77,212 - $88,935
Income Estimation: 
$101,213 - $124,848
Income Estimation: 
$90,267 - $107,792
Income Estimation: 
$90,926 - $113,495
Income Estimation: 
$102,148 - $116,687
Income Estimation: 
$105,809 - $128,724
Income Estimation: 
$136,611 - $163,397
Income Estimation: 
$135,163 - $163,519
Income Estimation: 
$131,953 - $159,624
Income Estimation: 
$150,859 - $181,127
Income Estimation: 
$104,754 - $125,215
Income Estimation: 
$134,206 - $155,125
Income Estimation: 
$134,206 - $155,125
Income Estimation: 
$171,024 - $193,943
Income Estimation: 
$171,024 - $193,943
Income Estimation: 
$206,482 - $238,005
View Core, Job Family, and Industry Job Skills and Competency Data for more than 15,000 Job Titles Skills Library

Job openings at Elevate Semiconductor

Elevate Semiconductor
Hired Organization Address San Diego, CA Full Time
At Elevate Semiconductor, our mission is to empower semiconductor and system test customers by delivering world-class te...
Elevate Semiconductor
Hired Organization Address San Diego, CA Full Time
At Elevate Semiconductor, our mission is to empower semiconductor and system test customers by delivering world-class te...

Not the job you're looking for? Here are some other Senior Analog IC Layout Engineer jobs in the San Diego, CA area that may be a better fit.

Analog IC Layout Engineer

Elevate Semiconductor, San Diego, CA

Senior Analog IC Test Engineer

Elevate Semiconductor, San Diego, CA

AI Assistant is available now!

Feel free to start your new journey!