What are the responsibilities and job description for the Senior Design Verification Engineer (FPGA) position at Engtal?
We are a leading high-frequency trading firm specializing in leveraging cutting-edge technology to maintain a competitive edge in financial markets. Our team is passionate about innovation, speed, and precision, and we are looking for a Senior FPGA Verification Engineer to join our growing hardware engineering team.
Job Summary:
As a Senior FPGA Verification Engineer, you will play a critical role in ensuring the reliability and performance of our FPGA-based trading systems. You will work closely with hardware and software teams to verify complex FPGA designs that support our ultra-low latency trading infrastructure.
Key Responsibilities:
- Develop and execute comprehensive verification plans for high-performance FPGA designs.
- Create and maintain testbenches, test cases, and verification environments using industry-standard tools and methodologies.
- Perform functional, performance, and system-level verification to identify and resolve issues.
- Collaborate with hardware and software teams to ensure seamless integration of FPGA components.
- Optimize verification processes to improve efficiency and coverage.
- Document verification processes, results, and methodologies for future reference.
Qualifications:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 5 years of experience in FPGA verification, preferably in low-latency or high-performance environments.
- Proficiency in SystemVerilog, UVM, and other verification frameworks.
- Strong understanding of FPGA architectures, protocols (e.g., Ethernet, PCIe), and high-speed design principles.
- Experience with simulation tools such as ModelSim, Questa, or Xilinx Vivado.
- Familiarity with scripting languages like Python or Perl for automation.
- Excellent problem-solving skills and attention to detail.
Preferred Qualifications:
- Experience in high-frequency trading or financial technology.
- Knowledge of low-latency networking and hardware/software co-design.
- Familiarity with Git, CI/CD pipelines, and agile development practices.
Salary : $300,000 - $450,000
