What are the responsibilities and job description for the Signal Integrity Engineer position at Eridu AI?
About Eridu AI
Eridu AI is a Silicon Valley hardware startup revolutionizing AI training performance. Our innovative solutions address bottlenecks in data centers, enhancing GPU utilization, reducing training cycles, and lowering costs. Validated by AI market leaders, including hyperscalers and other large, well-known AI market participants, our technology is poised to unlock unparalleled AI performance.
The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, systems and software, including serial entrepreneur Drew Perkins, Co-Founder of Infinera (NASDAQ: INFN, Lightera (acquired by Ciena), Gainspeed (acquired by Nokia) and Mojo Vision (the world’s leading micro-LED display company and developer of the first augmented reality contact lens).
Position Overview
We are seeking an experienced Signal Integrity Engineer to support the design and optimization of high-performance, data center-focused hardware for AI applications. In this role, you will be responsible for ensuring reliable high-speed data transfer across critical interfaces, including Ethernet and PCIe within our AI networking ICs. You will collaborate closely with cross-functional teams to optimize signal and power integrity from chip through package to PCB. If you’re passionate about building high-performance systems and solving complex integrity
challenges, this is an exciting opportunity to shape the future of AI networking.
Responsibilities
At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance.
Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
The Pay Range For This Role Is
210,000 - 325,000 USD per year(San Francisco Bay Area)
Eridu AI is a Silicon Valley hardware startup revolutionizing AI training performance. Our innovative solutions address bottlenecks in data centers, enhancing GPU utilization, reducing training cycles, and lowering costs. Validated by AI market leaders, including hyperscalers and other large, well-known AI market participants, our technology is poised to unlock unparalleled AI performance.
The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, systems and software, including serial entrepreneur Drew Perkins, Co-Founder of Infinera (NASDAQ: INFN, Lightera (acquired by Ciena), Gainspeed (acquired by Nokia) and Mojo Vision (the world’s leading micro-LED display company and developer of the first augmented reality contact lens).
Position Overview
We are seeking an experienced Signal Integrity Engineer to support the design and optimization of high-performance, data center-focused hardware for AI applications. In this role, you will be responsible for ensuring reliable high-speed data transfer across critical interfaces, including Ethernet and PCIe within our AI networking ICs. You will collaborate closely with cross-functional teams to optimize signal and power integrity from chip through package to PCB. If you’re passionate about building high-performance systems and solving complex integrity
challenges, this is an exciting opportunity to shape the future of AI networking.
Responsibilities
- Perform detailed signal integrity (SI) and power integrity (PI) analysis for high-speed interfaces such as Ethernet, PCIe, and DDR4/DDR5, in AI networking ICs.
- Develop and validate comprehensive models for end-to-end system integrity, including chip, package, and PCB transmission line modeling.
- Design and analyze power delivery networks (PDN), managing decoupling strategies, IR drop analysis, and power noise mitigation.
- Define and implement design guidelines for signal and power integrity, including specifications for PCB layout, stack-up, trace routing, and component selection.
- Conduct lab testing and validation to ensure SI/PI integrity using tools such as Time Domain Reflectometers (TDR), Vector Network Analyzers (VNA), and oscilloscopes.
- Collaborate with circuit design, packaging, and firmware teams to troubleshoot and optimize SI/PI parameters for high reliability and performance.
- Lead simulation and optimization efforts for high-speed interfaces, addressing key SI issues like crosstalk, jitter, and inter-symbol interference (ISI).
- Create and execute test plans, correlate results with simulations, and provide recommendations for improvement.
- Mentor junior engineers on SI/PI design principles and best practices.
- Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field; Master’s preferred.
- 8 years of experience in signal integrity and power integrity for high-speed, high- performance systems, especially in data center or AI networking hardware.
- Strong background in Ethernet and PCIe protocols, including experience with high-speed SerDes and other advanced serial link technologies.
- Expertise in SI/PI simulation tools such as Ansys HFSS, Cadence Sigrity, CST, HSPICE, and ADS.
- Experience with lab validation equipment, including TDR, VNA, oscilloscopes, and JBERT for signal integrity testing.
- In-depth understanding of PDN design and power noise reduction techniques for reliable power delivery.
- Proficiency in end-to-end interconnect modeling, link budgeting, and jitter decomposition.
- Excellent collaboration skills, with a proven track record of working in cross-functional teams.
- Strong problem-solving skills and a proactive approach to addressing SI/PI challenges in high-speed data environments.
At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance.
Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
The Pay Range For This Role Is
210,000 - 325,000 USD per year(San Francisco Bay Area)
Salary : $210,000 - $325,000
