What are the responsibilities and job description for the Senior Analog RFIC Design Engineer position at Everest Consultants, Inc.?
Title: Senior Analog RFIC Design Engineer
Duration: Permanent, Full-time
Location: Hillsboro, OR (Hybrid: onsite 3 days per week)
Salary Range: $140K to $200K per year
**Candidates must have valid U.S. work authorization at the time of hire. Visa support available via H1 transfer only **
Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals who have a vision for the future, a desire to impact the world, and a drive to turn innovative ideas into reality. They are hiring development teams to design the next generation of analog RFICs for advanced wireless communication systems. The team is currently seeking a skilled and motivated Senior Analog RFIC Design Engineer to drive the development of cutting-edge solutions for the wireless communications and aerospace markets.
Position Description:
The role involves independently designing various functional blocks with a thorough understanding of detailed analog circuit design. In-depth knowledge of BiCMOS and CMOS process technologies will be leveraged to design and operate analog blocks such as low-noise, high-linearity amplifiers, mixers, VCOs, filters, line drivers, power amplifiers, and mixed analog/custom digital circuits, along with basic analog building blocks like op-amps, comparators, current sources, current mirrors, and voltage references.
Expertise in RF engineering, including transmission line theory, matching, and RF device models, will be applied, along with an understanding of high-speed data converter principles. The role requires using simulation models, design rules, and verification procedures (e.g., DRC/LVS/ERC), addressing design challenges like minimizing device mismatch, noise, signal coupling, ESD, and ensuring circuit stability.
Experience in designing analog integrated circuits for complex mixed-signal SoCs, from concept through to production, is essential. Collaboration will be key, as effective teamwork is required to share expertise, provide and receive feedback, and address technical issues together.
Clear communication of technical matters with both internal and external customers in English is expected. Tools for this role will include transistor-level design tools (e.g., Cadence Analog Artist, Explorer), layout tools (e.g., Cadence Virtuoso), verification/extraction, documentation, and system-level design tools (e.g., Matlab, Verilog-AMS).
Position Responsibilities:
- Design and implement high speed (> 20GHz) analog/mixed-signal circuits for data converters and RF SOCs in advanced CMOS/BiCMOS technology for integration in high performance mixed-signal SoCs.
- Design, simulate, analyze, model, document and communicate integrated circuit IP.
- Understand system level design requirements as applied to integrated circuit design.
- Characterization and debugging of analog IC designs for testing and measurement equipment.
- Meet deadlines and schedules as part of a team.
Position Qualifications:
- M.S. in Electrical Engineering.
- A minimum of 5 years of experience in IC Design.
- Thorough understanding of detailed analog circuit design and the ability to design independently various functional blocks.
- In-depth understanding of BiCMOS and CMOS process technologies
- Knowledge in the design and operation of the following analog blocks: low noise high linearity amplifiers and mixers, VCOs, filters, line drivers, power amplifiers, mixed analog / custom digital circuits, basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references)
- Good knowledge of RF engineering, specifically transmission lines theory, matching, RF device models
- Good knowledge of high-speed data converters principles
- Understanding of simulation models, design rules, and verification procedures (DRC/LVS/ERC)
- Experience with design details such as: minimizing device mismatch, noise, signal coupling, ESD, circuit stability.
- Experience designing analog integrated circuits for a complex mixed signal SoCs from creation into production.
- Work effectively in a group setting (share expertise, provide and receive feedback, communicate technical issues, work in a team environment to resolve technical issues)
- Communicate effectively with both internal and external customers in English
- Tools Requirement: transistor level design tools (Cadence Analog Artist, Explorer), layout tools (Cadence Virtuoso), verification/extraction, experience with documentation, and system level design tools (e.g. Matlab, Verilog-AMS, etc.).
Salary : $140,000 - $200,000