What are the responsibilities and job description for the Physical Design Engineer position at Fidelis Companies?
Physical Design Engineer – San Jose
Position Overview
This role focuses on the physical design of integrated circuits (ICs), where you will be responsible for the end-to-end implementation of physical design processes, including synthesis, floorplanning, clock tree synthesis (CTS), and place and route. You will work on high-speed designs and contribute to the development and validation of power grids and clock constraints, playing a crucial role in ensuring designs meet performance and manufacturing requirements.
Key Responsibilities
- Physical Design Implementation : Perform physical synthesis, floor planning, clock tree synthesis (CTS), place and route, and other key physical design tasks in compliance with industry standards.
- Power Grid and Clock Constraints : Develop and implement high-speed clock and power grid specifications and constraints to optimize power efficiency and design performance.
- Physical Design Verification : Debug and resolve LVS / DRC issues at both the block and chip levels using physical design verification methodologies.
- Timing and Signal Integrity : Perform static timing analysis (STA), handle clock domain crossing (CDC), and understand parasitic delays through SDF-annotated simulations.
- Mixed-Signal Environment : Work within mixed-signal environments, ensuring smooth integration between analog and digital components in the design.
- Tape-Out and Foundry Interface : Manage design tape-out processes and collaborate with foundries, ensuring a solid understanding of the semiconductor supply chain.
Required Qualifications
Preferred Qualifications
