What are the responsibilities and job description for the Senior Validation Systems Engineer position at Freemind Solutions?
Contractor - Senior Validation Systems Engineer
San Jose, CA, USA
Job Description
FPGA Engineer position is your opportunity to join one of the industry's leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about FPGAs and computer architecture. As the FPGA Engineer , you will have the opportunity to work in design verification, debug and system integration. You will work closely with the Architecture, Verification, ASIC Design and Software teams, and report into the Engineering organization.
KEY RESPONSIBILITIES
Help set up FPGA / Emulation platform (Synopsys HAPS) and device modeling
Help set up FPGA / Emulation debugging tools
Help customize the SOC design for the FPGA platform
Duties include modeling, debugging, verification and SW support
Work with SOC design engineers, verification team, systems team and software engineering to perform early prototyping, debug issues and identify fixes; and
Support test program development, chip validation, and chip life until production maturity.
Qualifications
Strong experience working with FPGAs. Familiarity with PCIe, USB, Ethernet, SPI, CPU and other commonly used blocks in SOC ASIC designs
Strong experience working with FPGA tools like Vivado
Familiar with Synopsys HAPS FPGA system preferred
Good communication skills
BS or MS (preferred) degree in EE / EECS / CS or equivalent.
5 plus years of working experience
On-site position
Phone interview is OK
Out of state candidates are OK if they are good
