What are the responsibilities and job description for the Verification Manager position at GeorgiaTEK Systems Inc.?
Senior FPGA Design Verification Engineer
Location: Dedham, MA (On-site)
Relocation: Paid
Compensation: Salary Sign-on Bonus
Security Clearance: Active Secret Clearance required
Citizenship: U.S. Citizens only (Visa candidates not considered)
Contact: Mike | mike@georgiait.com | (404) 940-1155
About the Role:
General Dynamics Mission Systems is hiring a Senior FPGA Design Verification Engineer to join a cross-functional product team responsible for secure product design—from system architecture through production. You’ll be hands-on with cutting-edge cyber and defense hardware, working on mission-critical systems.
Key Responsibilities:
- Define verification methodology for complex FPGA designs
- Analyze design requirements and create detailed test plans
- Build and scale simulation environments using SystemVerilog/UVM
- Drive code and functional coverage, assertions, and automated testing
- Collaborate with cross-functional teams in a dynamic agile environment
Required Qualifications:
- Active Secret Clearance
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
- 5 years of FPGA/ASIC verification experience
- Strong experience with SystemVerilog, UVM, OVM
- Scripting with Python, Perl, TCL, or similar
- Familiarity with code coverage, functional coverage, and assertions
- Excellent problem-solving and communication skills
Preferred (Nice to Have):
- Experience with VHDL or other HDLs
- Exposure to Xilinx FPGAs, Questa/ModelSim tools
- ASIC design knowledge is a plus
