What are the responsibilities and job description for the Design Verification Engineer position at Global Placement Firm?
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Company seeking for an entrepreneurial individual to join their Tucson, AZ integrated circuit development team!
Responsibilities:
Responsible for driving the functional verification efforts of our mixed-signal motor control integrated circuits designs. Verification planning, test bench development, coverage analysis, digital/mixed-signal modeling, directed/constraint-random test generation, flow development, and support of failure analysis and resolution. Work closely with digital/analog designers, applications engineers and manufacturing test to support both pre-silicon verification and post silicon validation efforts.
Qualifications:
- MSEE or MSCS plus 5 years of verification experience preferably in mixed signal products.
-Ability to communicate complex technical concepts and the desire to be a key contributor to the growth of our Apex Precision Power division.
-Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/OVM, Vera) required.
-Solid scripting skills with Matlab, Perl, Unix/Linux shell, TCL, and must be able to write and debug analog behavioral models in Verilog, Verilog-A, and/or Verilog-AMS.
-Proven ability to create, evaluate, debug, and improve a verification process is essential for this position.
Requirements:
- Bachelor's Degree
- 5-7 years experience
- Mixed signal or analog IC experience
***40 hours per week
***Full Benefits
***Bonus Eligible
***Relocation Assistance Available
***Interview Travel Reimbursement Available
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