What are the responsibilities and job description for the System Hardware Engineer position at Goldenpick Technologies?
Responsibility
Define and implement comprehensive validation methodologies that guarantee our products meet both component and system-level product requirements
Collaborate with Design Engineering to bring up cutting-edge silicon photonic and laser products, troubleshooting and resolving any technical issues that arise Establish a proactive customer support platform
Validate Component and System Performance
Drive Continuous Improvement and Lead New Product Introduction (NPI)
Deliver Customer-Ready Documentation and Make Critical Decisions
Develop Test Software and Infrastructure and Ensure Timely Delivery
Experience :
2 to 5 years of experience
Industry experience in semiconductor laser & photonic devices, system test & validation
Experience with component and system test equipment (BERT, DCA, OSA, etc.) and standard signal quality metrics (TDECQ, SRS, URS)
Comprehensive knowledge of communication protocols and standards (Ethernet, PCIe, etc.).
Experience with system and sub-system test equipment (BERT, DCA, OSA, etc.) and standard signal quality metrics (TDECQ, SRS, URS).
Experience in high-speed SerDes and their system validation & optimization.
Proficient in programming languages such as C, C , Python and Shell scripts
Knowledge of optical transceiver packaging and integration challenges
Collaborate with Design, Package, and Reliability Engineering to ensure a smooth and successful transition of products from development to mass production.
Collaborate with multi-disciplinary teams to identify and implement product improvements through Automatic Test Equipment (ATE), bench characterization, and other techniques.
Perform rigorous design validation on new chips and products through electrical and optical characterization of VLSI integrated circuits and optoelectronic systems.
Able to analyze complex technical problems, identify root causes, and develop effective solutions.
Experience with SoC validation planning, bring-up, debugging, and optimization.
Experience with high-speed SerDes and their characterization and optimization.
Knowledge of optical transceiver packaging and integration challenges.
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