What are the responsibilities and job description for the Design verification Engineer position at Hecta Data LLC DBA Vilwaa?
Job Details
Role: Design verification Engineer
Location: Sunnyvale or Austin, USA
- Design Verification Engineering Services
- Testbench development System Verilog Universal Methodology ( UVM ), Python, and C tests
- Integration/development of C tests/Application Programming Interface ( APIs ) and software build flow
- Integration of UVM testbenches
- Test development and debug, including without limitation tests for functionality, power, performance, error, and connectivity, both for RTL and Gate Level Netlist Design Under Test, tests for functional and code coverage improvements
- Coverage collection and closure
- Documentation of tests, testbench, use-cases, exclusions, and status
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
