Principal Architect - Novel Advanced Packaging Solutions for Systems Thermal Management

Principal Architect - Novel Advanced Packaging Solutions for Systems Thermal ManagementDescription -We are seeking an experienced Principal Architect with 8-15 years of technical expertise in advanced packaging for semiconductor chips, specifically focusing on embedding and integrating advanced thermal management solutions, such as using silicon microchannels. This role is critical for enhancing the thermal performance of chips used in electronics, computing, and data center applications. The ideal candidate will possess a comprehensive understanding of the semiconductor packaging industry landscape, including key players, innovative technologies, and future trends. A strong academic background in engineering or a related field is essential.Responsibilities : Architectural Expertise : Define and drive the architectural vision for advanced packaging solutions that incorporate silicon microchannels for enhanced thermal management, ensuring alignment with business objectives and market needs.Design and Development Strategy : Drive the development of innovative packaging strategies that integrate advanced thermal management solutions, optimizing heat dissipation and reliability while maintaining performance.Cross-Functional Collaboration : Work closely with cross-disciplinary teams—including microfluidics design & materials, advanced packaging, system architecture, and manufacturing—to ensure seamless integration of thermal management solutions into overall design solution.Market Analysis and Strategy : Conduct thorough analyses of industry trends and emerging technologies related to thermal management to inform strategic direction and product development initiatives.Research and Innovation : Drive research efforts into next-generation packaging and thermal management technologies using silicon microchannels, fostering innovation to maintain competitive advantage in the market.Technical Mentorship : Provide guidance and mentorship to engineering teams on best practices in advanced packaging design and thermal management implementation.Stakeholder Engagement : Engage with external partners, suppliers, and industry groups to foster collaboration and drive advancements in packaging technologies that incorporate thermal management solutions.Education & Experience : Education : Bachelor’s degree in Electrical Engineering, Materials Science, or a related field. Master’s degree or PhD preferred.Experience : 8-15 years of relevant experience in semiconductor packaging with a focus on advanced techniques such as 2.5D / 3D integration, fan-out packaging, or system-on-chip (SoC) solutions.Technical Expertise : Deep knowledge of advanced packaging technologiesFamiliarity with industry standards and best practices in semiconductor manufacturing.Strong analytical skills to assess performance metrics related to thermal management and drive improvements.Industry Insight : Comprehensive understanding of the semiconductor and advanced packaging ecosystem, including key players, suppliers and networks.Knowledge of current competitive state-of-the-art technologies and future directions in advanced packaging.Preferred Qualifications : Industry experience with chiplet integration and heterogeneous system design.Relevant background in thermal management using silicon microchannels and thermal interface materials (TIMs) is plus.Proven track record of successful project management in a technical environment.Excellent communication skills to effectively present ideas and collaborate with stakeholders.The base pay range for this role is $146,650 to $225,850 annually with additional opportunities for pay in the form of bonus and / or equity (applies to US candidates only). Pay varies by work location, job-related knowledge, skills, and experience.Benefits : HP offers a comprehensive benefits package for this position, including : Health insuranceDental insuranceVision insuranceLong term / short term disability insuranceEmployee assistance programFlexible spending accountLife insuranceGenerous time off policies, including;4-12 weeks fully paid parental leave based on tenure11 paid holidaysAdditional flexible paid vacation and sick leave (US benefits overview)The compensation and benefits information is accurate as of the date of this posting. The Company reserves the right to modify this information at any time, with or without notice, subject to applicable law.Job -EngineeringSchedule -Full timeShift -No shift premium (United States of America)Travel -Relocation -YesEqual Opportunity Employer (EEO) -HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.If you’d like more information about HP’sEEO Policyor your EEO rights as an applicant under the law, please click here : Equal Employment Opportunity is the LawEqual Employment Opportunity is the Law – SupplementSummaryLocation : Corvallis, Oregon, United States of AmericaType : Full time

Salary : $146,650 - $225,850