What are the responsibilities and job description for the EDA/CAD SoC/IP Verification Infrastructure Engineer position at IBA Infotech Inc.?
Job Description
Role : Verification Infrastructure Engineer
Location : San Francisco, CA / Seattle, WA / Santa Clara, CA
Job Type : Contract
Interview : Phone / Video
Join our team to enhance verification infrastructure for cutting-edge silicon design!
Key Responsibilities :
Work on subsystems with multiple processors (ARM / RISC) and NOC
Utilize UVM-based SoC verification and write basic tests in C
Engage in design verification involving concurrency and memory access
Define and implement SoC verification plans
Develop functional tests and drive design verification to closure
Debug and resolve functional failures in collaboration with the Design team
Collaborate with cross-functional teams to ensure high design quality
Drive continuous improvements in design verification
Experience & Skills :
5 years in EDA / CAD SoC / IP design and / or verification infrastructure development
Proficiency in Python (Python 3.x) and Linux-based development (Shell scripting, Makefile)
Knowledge of ASIC / SoC flow, SystemVerilog / UVM
Strong analytical and problem-solving skills
Additional Information
All your information will be kept confidential according to EEO guidelines.
