What are the responsibilities and job description for the Hardware Engineer position at iFlow Inc.?
Title : Sr. Hardware Engineer – 2511
Location : Palo Alto
Duration : Long Term
JOB DESCRIPTION
Schedule : M-F (9-6 with flex depending on business needs)
This role is 100% on site
- Familiar with HW IP datasheets and user guides, extract critical information regarding register access sequences, expected operation sequences, and their corresponding results, including Register maps, Timing diagrams, Command sequences
- Develop test vectors based on the specifications outlined in the datasheet. Consider valid and invalid input scenarios, edge cases for register settings, timing and sequence requirements; enhance the test vectors by incorporating variations in conditions (temperature, voltage) to ensure robustness.
- Conducting Tests on Hardware Platforms. Hardware Setup : Utilize appropriate lab equipment (oscilloscopes, logic analyzers) for testing. Debugging Tools : Employ debuggers to monitor register accesses and to trace execution paths during testing.
- Data Collection and Analysis : Gather data from tests, noting any discrepancies from expected outcomes. Perform Function Validation by Assessing whether the observed results align with the expected results from the datasheet / user guides. Perform Failure Analysis and Identify potential root causes for any failures, such as timing issues, incorrect register settings, or environmental factors.
- Common IO Protocols : Have a hands-on understanding of protocols like JTAG, SPI, I2C, and UART, focusing on Signal integrity, Communication sequences; Use tools to probe these interfaces and verify correct operation during the bring-up phase.
- High-Speed IO Testing : Utilize oscilloscopes to inspect eye diagrams and other analog characteristics to assess signal integrity. Measure jitter, rise / fall times, and overall signal quality to ensure compliance with specifications.
- Test Fixture Development : Design and implement simple test fixtures using Reference design kits, cables and connectors to facilitate testing of the hardware IP. Ensure the test fixture can accommodate various configurations to test different scenarios.
