What are the responsibilities and job description for the Analog IC Design Engineer position at Insight Global?
As an Analog design engineer, you will be responsible for the analysis, design, and development of analog integrated circuits used in next generation mobile devices in SOI and CMOS technologies. Typical circuitry to be developed will include MOSFET biasing and control voltage / current blocks, linear and logarithmic RF detectors, over-voltage / over-current protection circuits, regulators, charge pump circuits, and a range of closed loop feedback circuits. Preferred candidate should also have mixed signal and digital integration experience. Some developments will also require basic skills in system level analysis.
Salary Range 130,000-150,000
We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity / affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and / or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal. com.
To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy : https : / / insightglobal.com / workforce-privacy-policy / .
- RF circuits including amplifiers and switches
- Bipolar device and applications
- SOI and CMOS process and technology
- Bachelor's degree (minimum) with 8-years minimum experience with demonstrated track record of product ownership / delivery. M. S. or Ph. D. preferred.
- Comprehensive simulation skills in Cadence including PEX, Monte Carlo, and Corner analysis.
- Detailed knowledge in standard analog cell design including bandgaps, op-amps, detectors, regulators, precision current sources, basic logic synthesis.
- Mixed signal and digital integration experience.
- Exposure to best analog layout practices in Cadence Virtuoso.
- Exposure to commercial CMOS or SOI wafer fab technologies, 180nm or below.
