ASIC STA and CAD Methodology Expertise

Role: ASIC STA and CAD Methodology Expertise for High-Performance Design Implementation and Timing Closure
Duration – 12 Months ext
It’s a hybrid role – Location can be Markham, Ontario, Canada or Longmont, Colorado, USA.
KEY RESPONSIBILITIES:

• Developing block and SoC timing constraints, full chip STA setup and signoff of multi-corner multi-voltage designs.
• Owning timing flow and execution to meet SoC timing requirements including timing budgeting, repeater planning, constraints/exceptions generation and management
• Engaging closely with block and SoC design teams to understand the design requirements, STA constraints, and convergence challenges.
• Engaging closely with physical implementation teams to ensure designs meet QoR and debug timing failures

PREFERRED EXPERIENCE:

• 10 years of professional experience in ASIC implementation and CAD methodology, preferably experience closing timing of high performance designs.
• Demonstrated ability in areas of ASIC STA constraints generation, timing analysis, timing convergence, and ECOs, at both block and full chip level, is a must
• Implementation experience and knowledge handling multi-voltage design is expected. STA closure of low power and multi-power mode designs is an added advantage.
• Expertise in industry standard ASIC EDA tools, including Synopsys DC and Primetime is required.
• Proficiency in scripting language, such as, TCL, Perl and/or Python
• Experience developing scripts to automate design flow, analysis

Job Type: Full-time

Pay: $60.00 - $70.00 per hour

Benefits:

• Dental insurance
• Life insurance
• Vision insurance

Schedule:

• 8 hour shift

Education:

• Bachelor's (Required)

Experience:

• CAD Methodology: 10 years (Required)
• ASIC implementation: 10 years (Required)

Ability to Relocate:

• Longmont, CO 80504: Relocate before starting work (Required)

Work Location: In person

Salary : $60 - $70