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onsite-ASIC RTL / SoC Design (exp in RTL / SoC / digital design) Engineer

Jobspro Staffing
Newark, CA Full Time
POSTED ON 3/6/2025
AVAILABLE BEFORE 6/3/2025

Job Description

Job Description

ASIC RTL / SoC Design(exp in RTL / SoC / digital design) Engineer Onsite Near Newark N. CA Lead RTL design (5 yrs exp) , simulation, and verification efforts for ASIC / SoC products, ensuring robust and efficient designs

  • Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility
  • Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs
  • Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout
  • Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and / or in-memory computing applications
  • Provide crucial support for Post-Si testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product

Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to foster their professional growth

  • Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability
  • Stay up-to-date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency
  • Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery
  • Requirements :

    MS with 5 years of experience or PhD in Electrical Engineering with emphasis on RTL / SoC / digital design

    Experience with Verilog and system Verilo

    Experience with VCS, Verdi or other industry standard tools

    Experience with pre-layout simulation and post-layout simulation

    Understanding of the design flow. Ability to work with the backend team

    Familiarity with AMBA APB AXI Protocol

  • Familiarity with RISC / Arm or other core architectures
  • Ability to create innovative architecture and solutions to customer requirements
  • Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.
  • Experience in one or more of the following areas considered a strong plus :
  • FPGA / ASIC design of image processing systems
  • Working knowledge of SoC architecture such as CPU, GPU or accelerators
  • Familiarity with : UVM, place-and-route, STA, EM / IR / Power
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