What are the responsibilities and job description for the Senior FPGA Design Verification Engineer position at Kaav Inc?
Job Title: Senior FPGA Design Verification Engineer
Location: Dedham, MA (On-site) | Relocation Available
Experience: 10 to 12 years
Security Clearance: Active DoD Secret Clearance Required
Industry: Aerospace | Defense | Aviation
π― About the Role:
We are seeking a highly skilled Senior FPGA Design Verification Engineer to join our team in Dedham, MA. This is a critical role within our high-security defense programs, where you will work on cutting-edge FPGA/ASIC verification methodologies for mission-critical aerospace and defense applications.
πΉ As a Senior Cyber FPGA Design Verification Engineer, you will be part of a cross-functional team leading the verification and validation of high-performance FPGA solutions. You will work on SystemVerilog/UVM-based verification strategies, ensuring secure, scalable, and reliable FPGA-based solutions.
π― Key Responsibilities:
β Lead the verification of FPGA designs using UVM/SystemVerilog to ensure functionality, performance, and security.
β Develop and implement test plans, verification environments, and automation frameworks.
β Utilize Questa Advanced Functional Verification tools, OVM/UVM methodologies, and scripting languages like Python, Perl, TCL.
β Conduct functional, performance, and stress testing for FPGA subsystems.
β Drive code coverage, functional coverage, and assertion-based verification.
β Collaborate with hardware, software, and cybersecurity teams to refine FPGA architectures.
β Work with Xilinx FPGA and other high-performance computing platforms for mission-critical applications.
π― Qualifications & Requirements:
πΉ Education: Bachelorβs or Masterβs degree in Electrical Engineering, Computer Engineering, or a related field.
πΉ Experience: 10-12 years of relevant experience in FPGA design verification for aerospace, defense, or high-security applications.
πΉ Security Clearance: Active DoD Secret Security Clearance (Mandatory).
π― Technical Skills:
β Expertise in FPGA verification methodologies (SystemVerilog/UVM, OVM, VHDL).
β Experience defining verification strategies for complex FPGA designs.
β Hands-on experience with simulation tools like Questa, ModelSim, or VCS.
β Familiarity with Xilinx FPGA platforms and hardware security best practices.
β Proficiency in scripting languages (Python, Perl, Bash, TCL) for test automation.
β Strong debugging, troubleshooting, and optimization skills.
β Knowledge of secure FPGA design principles and defense industry compliance.
π― Preferred Skills & Experience:
π‘ FPGA/ASIC design experience is a plus.
π‘ Familiarity with microelectronics security and cryptographic implementations.
π‘ Experience with containerized verification environments (Docker, Jenkins, CI/CD pipelines).
π‘ Background in aerospace, defense, or classified DoD programs.
π₯ Why Join Us?
π Work on mission-critical national security projects with industry leaders.
π Highly competitive compensation & comprehensive benefits package.
π Flexible work schedules (9/80 schedule with every other Friday off).
π Career advancement opportunities in aerospace & defense engineering.
π Diverse, inclusive, and innovative work environment.
Thanks & Best Regards,Β
Sivaji Katta
Technical Recruiter
Kaav Inc. 3925 75th St, Suite 101 A, Aurora IL β 60504Β
Email: sivaji.k@kaavinc.com
Ph: 847-474-3646 Ext: 107
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