Demo

Senior FPGA Design Verification Engineer

Kaav Inc
Dedham, MA Full Time
POSTED ON 2/5/2025
AVAILABLE BEFORE 8/2/2025

Job Title: Senior FPGA Design Verification Engineer

Location: Dedham, MA (On-site) | Relocation Available

Experience: 10 to 12 years

Security Clearance: Active DoD Secret Clearance Required

Industry: Aerospace | Defense | Aviation


🎯 About the Role:

We are seeking a highly skilled Senior FPGA Design Verification Engineer to join our team in Dedham, MA. This is a critical role within our high-security defense programs, where you will work on cutting-edge FPGA/ASIC verification methodologies for mission-critical aerospace and defense applications.

πŸ”Ή As a Senior Cyber FPGA Design Verification Engineer, you will be part of a cross-functional team leading the verification and validation of high-performance FPGA solutions. You will work on SystemVerilog/UVM-based verification strategies, ensuring secure, scalable, and reliable FPGA-based solutions.


🎯 Key Responsibilities:

βœ” Lead the verification of FPGA designs using UVM/SystemVerilog to ensure functionality, performance, and security.

βœ” Develop and implement test plans, verification environments, and automation frameworks.

βœ” Utilize Questa Advanced Functional Verification tools, OVM/UVM methodologies, and scripting languages like Python, Perl, TCL.

βœ” Conduct functional, performance, and stress testing for FPGA subsystems.

βœ” Drive code coverage, functional coverage, and assertion-based verification.

βœ” Collaborate with hardware, software, and cybersecurity teams to refine FPGA architectures.

βœ” Work with Xilinx FPGA and other high-performance computing platforms for mission-critical applications.


🎯 Qualifications & Requirements:

πŸ”Ή Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

πŸ”Ή Experience: 10-12 years of relevant experience in FPGA design verification for aerospace, defense, or high-security applications.

πŸ”Ή Security Clearance: Active DoD Secret Security Clearance (Mandatory).


🎯 Technical Skills:

βœ… Expertise in FPGA verification methodologies (SystemVerilog/UVM, OVM, VHDL).

βœ… Experience defining verification strategies for complex FPGA designs.

βœ… Hands-on experience with simulation tools like Questa, ModelSim, or VCS.

βœ… Familiarity with Xilinx FPGA platforms and hardware security best practices.

βœ… Proficiency in scripting languages (Python, Perl, Bash, TCL) for test automation.

βœ… Strong debugging, troubleshooting, and optimization skills.

βœ… Knowledge of secure FPGA design principles and defense industry compliance.


🎯 Preferred Skills & Experience:

πŸ’‘ FPGA/ASIC design experience is a plus.

πŸ’‘ Familiarity with microelectronics security and cryptographic implementations.

πŸ’‘ Experience with containerized verification environments (Docker, Jenkins, CI/CD pipelines).

πŸ’‘ Background in aerospace, defense, or classified DoD programs.


πŸ”₯ Why Join Us?

🌟 Work on mission-critical national security projects with industry leaders.

🌟 Highly competitive compensation & comprehensive benefits package.

🌟 Flexible work schedules (9/80 schedule with every other Friday off).

🌟 Career advancement opportunities in aerospace & defense engineering.

🌟 Diverse, inclusive, and innovative work environment.


Thanks & Best Regards,Β 

Sivaji Katta

Technical Recruiter

Kaav Inc. 3925 75th St, Suite 101 A, Aurora IL – 60504Β 

Email: sivaji.k@kaavinc.com

Ph: 847-474-3646 Ext: 107

Β 

#FPGA #ASIC #Verification #UVM #SystemVerilog #VHDL #CyberSecurity #DefenseJobs #AerospaceJobs #HiringNow #DoDSecurity #ElectricalEngineering #MissionCritical #FPGAJobs #SecurityClearance #EmbeddedSystems #CyberEngineering #Xilinx #Questa #TopSecret #ClearanceJobsΒ 

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