Lead, FPGA UVM Design Engineer

Job Title : Lead, FPGA UVM Design Engineer

Job Location : Salt Lake City, UT

Job Code : 21254

Work Schedule : 9x80

Job Description :

We are looking for a talented FPGA design engineer with industry experience in Universal Verification Methodology (UVM), wireless digital communications, modems, networking, and / or digital signal processing (DSP). We design advanced wireless digital communication systems and electronic warfare systems. Development efforts include the whole lifecycle of designs from proposals, requirement definition, coding, simulation, synthesis, place and route, verification testing, and system support. We are looking for an engineer who enjoys challenging work with a team of talented engineers and can work well both with a team and as an individual contributor. Salt Lake City provides incredible year-round outdoor recreation options and cultural experiences, and L3Harris values your work / life balance so you can enjoy these opportunities.

Areas of desired technical experience or education include :

RTL Design, implementation, validation, system integration, and support of high speed digital FPGA designs in compliance with written specifications within a DoD process controlled work environment

Modulation and Demodulation

Digital filters

Forward Error Correction (FEC)

Networking

Industry standard interfaces (e.g. 10 / 100 / 1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet)

FPGA verification through simulation and unit testing

Basic Qualifications :

Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related software engineering experience

Ability to obtain a U.S. Security Clearance

Preferred Skills :

Bachelor’s (Master’s preferred) degree in Computer Science, Computer Engineering, Software Engineering or Electrical Engineering.

9 years FPGA design experience

Experience leading technical employees

Expertise in UVM

Expertise in teaching and training others in UVM

Experience in either VHDL (preferred) or Verilog development languages.

Experience implementing complex modem and / or DSP circuits in programmable logic using FPGA devices. Equivalent experience in ASIC design is also applicable.

Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and / or Altera Quartus development tool sets.

Experience working on project teams.

Experience with HLS (High-Level Synthesis)

Experience with timing closure in large FPGAs.

Experience in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices.

FPGA Design using High-speed serial interfaces (3 Gbps)

Familiarity with code revision management tools such as Git / Clearcase.

LI-HJ1

L3Harris Technologies is proud to be an Affirmative Action / Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.