Hardware Engineer at Palo Alto, CA (Onsite from day 1)

Job Title:Embedded Hardware Engineer

Location: Palo Alto, CA (Onsite form day 1)

Duration: 6 months

Responsibilities:

Have a deep understanding of embedded system components and bus protocols (e.g., AMBA), and its boot up sequences.

Familiar with JTAG-based debuggers to halt and resume processors, set breakpoints, and debug at both the transaction and process levels.

Analyze and debug complex applications involving multiple threads, Memory Management Units (MMUs), interrupts, and inter-process communication (IPC) mechanisms.

Toolchain Proficiency: Utilize GCC toolchains and GDB for effective development and debugging of embedded software.

Driver Debugging: Investigate and resolve issues related to low-speed IO drivers (e.g. UART, GPIO, SPI, I2C), ensuring proper function within the system.

Familiar with one of the following High-speed IO protocols and has experience to bring-up and debug such interface and their drivers: Gigabit Ethernet, PCIe, CPHY, MPHY

Device Tree and Bootloaders: Work with device trees, U-Boot, and operating systems to manage hardware configurations and ensure proper system initialization.

Experience w/ secure boot process, and its bring-up and debug process.

Coding and Development: Write, review, and maintain high-quality C/C code, ensuring adherence to best practices in embedded software development

Following are additional details:

- Experience level required is 7 years of experience

- Hand on experience with SOC bring up and SOC early development cycle

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