What are the responsibilities and job description for the Analog Designer Intern - PhD position at Marvell Technology?
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Optical PHY (CE-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.
What You Can Expect
Design, simulate and verify analog blocks for industry leading optical transceivers.
Help test and characterize existing designs.
Work with custom layout engineers to implement designs.
System level/behavioral modeling
Minimum Qualification
What We're Looking For
Candidate must be pursuing an MS or PhD in electrical engineering with an emphasis on analog/mixed signal IC design.
Preferred Qualifications
Familiarity with tools such as Cadence, MATLAB and Python.
Good fundamentals of analog mixed-signal design including transistor device physics.
Solid understanding and experience of designing analog mixed-signal circuit blocks including PLL, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs, line drivers, etc.
In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
Design experience in advanced CMOS technologies, design with FINFET technology
Experience with high-speed high-linearity TX line-driver and/or high speed DACs
Experience with high-linearity RX design and its building blocks such as matching networks, CTLE, PGA, etc.
Experience with high-speed ADC design and techniques like time-interleaving, SAR, comparators, etc.
Candidate should be a self-starter and possess solid communication skills, both written and verbally.
Expected Base Pay Range (USD)
31 - 61, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit Elements
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Optical PHY (CE-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.
What You Can Expect
Design, simulate and verify analog blocks for industry leading optical transceivers.
Help test and characterize existing designs.
Work with custom layout engineers to implement designs.
System level/behavioral modeling
Minimum Qualification
What We're Looking For
Candidate must be pursuing an MS or PhD in electrical engineering with an emphasis on analog/mixed signal IC design.
Preferred Qualifications
Familiarity with tools such as Cadence, MATLAB and Python.
Good fundamentals of analog mixed-signal design including transistor device physics.
Solid understanding and experience of designing analog mixed-signal circuit blocks including PLL, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs, line drivers, etc.
In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
Design experience in advanced CMOS technologies, design with FINFET technology
Experience with high-speed high-linearity TX line-driver and/or high speed DACs
Experience with high-linearity RX design and its building blocks such as matching networks, CTLE, PGA, etc.
Experience with high-speed ADC design and techniques like time-interleaving, SAR, comparators, etc.
Candidate should be a self-starter and possess solid communication skills, both written and verbally.
Expected Base Pay Range (USD)
31 - 61, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit Elements
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
