Senior Staff Design IP Engineer

Responsibilities

We are seeking a highly skilled and experienced Senior Staff Design IP Engineer to join our dynamic team. The ideal candidate will have a strong background in Foundation IP, Spice Simulation, Library Characterization, EDA automation scripts, and IP script modifications. You will be responsible for understanding and analyzing SOC Hard and Soft IPs, reviewing silicon reports, and providing detailed analysis. Excellent collaboration skills with vendors and team members are essential. You will be focus on:

• Utilize in-depth knowledge of Foundation IP to evaluate and qualify IP’s. Able to benchmark and optimize Std cells/IO’s/memory for optimum performance, area or power needs of a project
• Conduct Spice simulations to verify the performance and reliability of designs on RC extracted netlists
• Perform library characterization to ensure accurate timing, power, and area models. Stay up-to-date with industry trends and emerging technologies in library characterization and PPA analysis
• Help to develop and maintain EDA automation scripts to streamline CAD flow and design processes
• Modify and optimize IPQA scripts to improve efficiency and performance
• Analyze and understand both hard and soft IPs within SOC designs. Work with IP vendors to deliver custom specs needed for MXL project needs
• Review silicon reports and provide detailed analysis to identify and resolve issues
• Work closely with vendors and cross-functional teams to ensure successful project outcomes. Collaborate with design teams to ensure seamless integration of libraries and IP blocks
• Maintain comprehensive documentation of IP Vendor engagement. Troubleshoot and resolve issues related to IP, EDA tools and automation flows

Qualifications

• Minimum 10 years of experience in design engineering or a related field. Good understanding of the IC design flow, including front-end and back-end processes
• Proficiency in Foundation IP, Spice Simulation, Library Characterization, EDA automation scripts, and IP script modifications. Familiarity with library characterization tools such as Liberate, Cadence Genus, or Synopsys Library Compiler
• Strong ability to review and analyze silicon reports and provide detailed insights. Excellent analytical and problem-solving skills
• Excellent interpersonal and communication skills for effective collaboration with vendors and team members
• Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or a related field
• Experience with advanced node technologies (e.g., 8nm, 4nm, and below)
• Experience with SOC IP design and verification
• Knowledge of emerging technologies such as FinFET, FD-SOI, or III-V semiconductors
• Familiarity with industry-standard EDA tools and methodologies
• Experience with tools such as Synopsys PrimeTime, Cadence Genus, or Mentor Graphics Questa

Company Overview

MaxLinear is a global, NASDAQ-traded company (MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, striving to improve the world’s communication networks for everyone through our highly integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi-market applications.

We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world’s most challenging communication technology problems in the most efficient and effective manner.

MaxLinear began by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we’ve expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel’s Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers’ needs.

Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Vancouver, Canada; Valencia, Spain; Bangalore and Chennai, India; Munich, Germany; Israel; and Singapore.

We have approximately 1,500 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building the best and most innovative products on the market.