What are the responsibilities and job description for the Verification Engineer position at Mice Groups?
Job Details
Mandatory Experience:
- 7 years experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycle
- Experience in the development of UVM based verification environments from scratch
- Experience with Design verification of Data-center applications like Video, AI/ML, and Networking designs
Minimum Qualifications
- B.S or M.S degree in Electrical Engineering, Computer Engineering or Computer Science
- Hands-on experience in Verilog, System Verilog, C/C based verification, and UVM methodology
- Experience in IP/sub-system and/or SoC level verification based on System Verilog UVM/OVM based methodologies
- Experience in EDA tools and scripting (Python, Perl, Shell) used to build tools and flows for verification environments.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
Salary : $75 - $85
