What are the responsibilities and job description for the Senior SOC Design Verification Engineer position at MIPS?
We are eeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data Processing Unit Chiplets and Automotive Microcontrollers. The candidate will be responsible for contributing to all phases of the verification lifecycle, including reviewing specifications, developing testbench architecture, creating test plans, defining and closing coverage, and debugging failing simulations.
Roles And Responsibilities
At MIPS, you`ll be a member of a fast-growing team of technologists that are creating the industry`s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you`ll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry`s most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting-edge applications with industry-leading customers.
At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!
More About Us
MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power-efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products.
Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions.
Roles And Responsibilities
- Hands-on development of testbenches, testcases and checkers to exercise and measure design behavior against specified intent.
- Debug differences in simulated behavior of designs and design specifications.
- Contribute to the development of DV flows and methodology for improved development efficiency.
- Independently manage verification tasks while mentoring junior team members.
- Collaborate with cross-functional teams (Spec, Design, etc) to resolve bugs.
- Bachelor`s degree in Electrical, Computer Engineering, Computer Science, or related field
- 5-8 years of experience in SoC verification.
- Expertise in writing tests using SystemVerilog, UVM and C.
- Experience with scripting languages like Python, Tcl, Tk, Perl.
- Understanding of SOC interconnects and bus standards such as AXI, AHB, APB.
- Excellent analytical and problem-solving skills.
- Proven written and verbal technical communication skills.
- Self-motivated, collaborative team player able to broadly contribute project goals.
- Innovative approach to improving existing processes and methodologies.
- Master`s degree in Electrical, Computer Engineering, Computer Science, or related field
- Experience with RISC-V, ARM and/or MIPS CPU architectures.
- Knowledge of register description languages (IP-XACT, SystemRDL, UVM RAL).
- Familiarity with Functional Safety standards (ISO 26262) and fault injection methodologies.
- Background with power-aware (UPF) and gate-level simulations (GLS)
- Familiarity of formal verification tools and techniques.
At MIPS, you`ll be a member of a fast-growing team of technologists that are creating the industry`s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you`ll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry`s most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting-edge applications with industry-leading customers.
At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!
More About Us
MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power-efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products.
Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions.
Salary : $110,000 - $150,000