What are the responsibilities and job description for the Senior Engineer- Emulation position at Mirafra Technologies?
- Create and support emulation models from RTL. Drive SOC bringup on emulation platforms, debug test failures and simulation/emulation mismatches.
- Develop compile and runtime flows to support various emulation usage models such as functional verification, hybrid simulation, post-si debug, power and software/firmware enablement.
- Develop capabilities to run tests on the emulators and assist in bring-up processes from RTL prototyping through post-silicon validation.
- Work with Tool vendors to drive the requirements and resolve any tool issues.
- Drive and Contribute to the methodology and automation improvements to improve Emulation efficiency and value addition.
Requirements
- In-depth knowledge of digital logic design, CPU/SOC architecture and microarchitecture, and industry standard interfaces and memory subsystems.
- Experienced level knowledge of Verilog/SystemVerilog.
- Experienced level knowledge C/C .Relevant knowledge of verification methodologies and tools such as simulators, waveform viewers, build and run automation.
- Experience with Palladium, Zebu, Veloce, Protium or HAPS.
- Experience with QEmu or other software simulators is a plus.
- Experience in simulation acceleration using transactors or vendors provided accelerated verification IP is a plus.
- Experience in performance analysis/debug techniques.
- Excellent knowledge of one of the scripting languages such as Python, TCL is a plus.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
